From: Trent Piepho <trent.piepho@igorinstitute.com>
To: Oleksij Rempel <o.rempel@pengutronix.de>
Cc: Barebox List <barebox@lists.infradead.org>
Subject: Re: [PATCH v1 1/1] usb: net: Add support for the Realtek RTL8152B/RTL8153
Date: Tue, 19 Oct 2021 11:50:08 -0700 [thread overview]
Message-ID: <CAMHeXxNn+DBLC4ePGUzmT25917uMhe_3i18O_6nu3yYJG-GbQg@mail.gmail.com> (raw)
In-Reply-To: <20211019102306.31884-1-o.rempel@pengutronix.de>
On Tue, Oct 19, 2021 at 3:24 AM Oleksij Rempel <o.rempel@pengutronix.de> wrote:
> +
> + buf = malloc(size);
> + if (!buf)
> + return -ENOMEM;
Barebox could use xmalloc here. Ditto for other malloc/return ENOMEM patterns.
> +static int r8152_write_hwaddr(struct eth_device *edev, const unsigned char *adr)
> +{
> + struct r8152 *tp = edev->priv;
> + u8 tmp_addr[ETH_ALEN];
> +
> + memcpy(tmp_addr, adr, ETH_ALEN);
> +
> + debug("** %s (%d)\n", __func__, __LINE__);
> +
> + ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
> + pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, tmp_addr);
This writes 8 bytes from a buffer of 6 bytes. It doesn't seem like
the temp buffer is even necessary.
> +/* Generic MII registers. */
> +#define MII_BMCR 0x00 /* Basic mode control register */
> +#define MII_BMSR 0x01 /* Basic mode status register */
> +#define MII_PHYSID1 0x02 /* PHYS ID 1 */
> +#define MII_PHYSID2 0x03 /* PHYS ID 2 */
> +#define MII_ADVERTISE 0x04 /* Advertisement control reg */
> +#define MII_LPA 0x05 /* Link partner ability reg */
> +#define MII_EXPANSION 0x06 /* Expansion register */
> +#define MII_CTRL1000 0x09 /* 1000BASE-T control */
> +#define MII_STAT1000 0x0a /* 1000BASE-T status */
> +#define MII_MMD_CTRL 0x0d /* MMD Access Control Register */
> +#define MII_MMD_DATA 0x0e /* MMD Access Data Register */
> +#define MII_ESTATUS 0x0f /* Extended Status */
> +#define MII_DCOUNTER 0x12 /* Disconnect counter */
> +#define MII_FCSCOUNTER 0x13 /* False carrier counter */
> +#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
> +#define MII_RERRCOUNTER 0x15 /* Receive error counter */
> +#define MII_SREVISION 0x16 /* Silicon revision */
> +#define MII_RESV1 0x17 /* Reserved... */
> +#define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */
> +#define MII_PHYADDR 0x19 /* PHY address */
> +#define MII_RESV2 0x1a /* Reserved... */
> +#define MII_TPISTATUS 0x1b /* TPI status for 10mbps */
> +#define MII_NCONFIG 0x1c /* Network interface config */
These are defined already in linux/mii.h
> +
> +static u8 r8152b_pla_patch_a[] = {
Surely all these firmware images can be const too.
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
next prev parent reply other threads:[~2021-10-19 18:52 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-19 10:23 Oleksij Rempel
2021-10-19 18:50 ` Trent Piepho [this message]
2021-10-20 6:18 ` Oleksij Rempel
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CAMHeXxNn+DBLC4ePGUzmT25917uMhe_3i18O_6nu3yYJG-GbQg@mail.gmail.com \
--to=trent.piepho@igorinstitute.com \
--cc=barebox@lists.infradead.org \
--cc=o.rempel@pengutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox