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From: Michael Graichen <michael.graichen@hotmail.com>
To: "barebox@lists.infradead.org" <barebox@lists.infradead.org>
Subject: [PATCH] some fixes for the zedboard build
Date: Fri, 27 Mar 2020 09:57:11 +0000	[thread overview]
Message-ID: <DB7PR02MB43329F5FA85160DA28F68030ABCC0@DB7PR02MB4332.eurprd02.prod.outlook.com> (raw)

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Hey, 

i've attached some fixes for the zedboard build that worked, at least, for me.
The MIO config in lowlevel.c seem to be very "hardware specific" but one can compare this to what Xilinx Vivado says.

When including the drivers for Networking, QSPI and SD one will run out of OCRAM very quickly that's why i commended out so much in the defconfig.

The changes to drivers/mci/Kconfig and drivers/mci/arasan-sdhci.c seem to be bug fixes.

Best regards and have a nice weekend 

Michael






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[-- Type: text/x-patch; name="fixes-for-the-zedboard.diff", Size: 5193 bytes --]

diff --git a/arch/arm/boards/avnet-zedboard/lowlevel.c b/arch/arm/boards/avnet-zedboard/lowlevel.c
index 912eb11fd..de3434e38 100644
--- a/arch/arm/boards/avnet-zedboard/lowlevel.c
+++ b/arch/arm/boards/avnet-zedboard/lowlevel.c
@@ -258,7 +258,7 @@ static void avnet_zedboard_ps7_init(void)
 
 	/* GEM0 */
 	writel(0x00000001, 0xf8000138);
-	writel(0x00500801, 0xf8000140);
+	writel(0x00100801, 0xf8000140);
 	writel(0x00000302, 0xf8000740);
 	writel(0x00000302, 0xf8000744);
 	writel(0x00000302, 0xf8000748);
@@ -271,8 +271,8 @@ static void avnet_zedboard_ps7_init(void)
 	writel(0x00001303, 0xf8000764);
 	writel(0x00001303, 0xf8000768);
 	writel(0x00001303, 0xf800076C);
-	writel(0x00001280, 0xf80007D0);
-	writel(0x00001280, 0xf80007D4);
+	writel(0x00000280, 0xf80007D0);
+	writel(0x00000280, 0xf80007D4);
 
 	writel(0x00000001, 0xf8000B00);
 
@@ -297,6 +297,16 @@ ENTRY_FUNCTION(start_avnet_zedboard, r0, r1, r2)
 
 	void *fdt = __dtb_zynq_zed_start + get_runtime_offset();
 
+	/* MIO_07 in GPIO Mode 3.3V VIO, can be uncomented because it is the default value */
+	writel(0x0000DF0D, ZYNQ_SLCR_UNLOCK);
+	writel(0x00000600, 0xF800071C );
+	writel(0x0000767B, ZYNQ_SLCR_LOCK);
+
+	/* turns on the LED MIO_07 */
+	writel((1<<7), 0xe000a204 );    // Direction
+	writel((1<<7), 0xe000a208 );    // Output enable
+	writel((1<<7), 0xe000a040 );    // DATA Register
+
 	arm_cpu_lowlevel_init();
 	zynq_cpu_lowlevel_init();
 
diff --git a/arch/arm/boards/avnet-zedboard/zedboard.zynqcfg b/arch/arm/boards/avnet-zedboard/zedboard.zynqcfg
index 3f8808d3d..76d5d8453 100644
--- a/arch/arm/boards/avnet-zedboard/zedboard.zynqcfg
+++ b/arch/arm/boards/avnet-zedboard/zedboard.zynqcfg
@@ -1,24 +1,2 @@
-#include <mach/zynq7000-header-regs.h>
-
-wm 32 ZYNQ_SLCR_UNLOCK		0x0000DF0D
-wm 32 ZYNQ_CLK_621_TRUE		0x00000001
-wm 32 ZYNQ_APER_CLK_CTRL	0x01FC044D
-
-wm 32 ZYNQ_ARM_PLL_CTRL		0x00028008
-wm 32 ZYNQ_ARM_PLL_CFG		0x000FA220
-wm 32 ZYNQ_ARM_PLL_CTRL		0x00028010
-wm 32 ZYNQ_ARM_PLL_CTRL		0x00028011
-wm 32 ZYNQ_ARM_PLL_CTRL		0x00028010
-wm 32 ZYNQ_ARM_PLL_CTRL		0x00028000
-
-wm 32 ZYNQ_IO_PLL_CTRL		0x0001E008
-wm 32 ZYNQ_IO_PLL_CFG		0x001452C0
-wm 32 ZYNQ_IO_PLL_CTRL		0x0001E010
-wm 32 ZYNQ_IO_PLL_CTRL		0x0001E011
-wm 32 ZYNQ_IO_PLL_CTRL		0x0001E010
-wm 32 ZYNQ_IO_PLL_CTRL		0x0001E000
-
-wm 32 ZYNQ_SDIO_CLK_CTRL	0x00000a03
-
 /* stop */
-wm 32 0xFFFFFFFF			0x00000000
\ No newline at end of file
+wm 32 0xFFFFFFFF			0x00000000
diff --git a/arch/arm/configs/zynq_defconfig b/arch/arm/configs/zynq_defconfig
index a16c57d5c..cc81fd120 100644
--- a/arch/arm/configs/zynq_defconfig
+++ b/arch/arm/configs/zynq_defconfig
@@ -2,46 +2,49 @@ CONFIG_ARCH_ZYNQ=y
 CONFIG_MACH_ZEDBOARD=y
 CONFIG_AEABI=y
 CONFIG_ARM_UNWIND=y
+# CONFIG_MEMINFO is not set
 CONFIG_MMU=y
 CONFIG_STACK_SIZE=0xf000
 CONFIG_MALLOC_SIZE=0x8000000
 CONFIG_MALLOC_TLSF=y
 CONFIG_KALLSYMS=y
-CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
-CONFIG_AUTO_COMPLETE=y
-CONFIG_MENU=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/avnet-zedboard/env"
-CONFIG_DEBUG_LL=y
-CONFIG_LONGHELP=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_ARM_MMUINFO=y
+# CONFIG_CMD_DEVINFO is not set
+# CONFIG_CMD_DRVINFO is not set
+# CONFIG_CMD_HELP is not set
+# CONFIG_CMD_BOOTU is not set
 CONFIG_CMD_GO=y
 CONFIG_CMD_RESET=y
-CONFIG_CMD_PARTITION=y
+# CONFIG_CMD_UMOUNT is not set
 CONFIG_CMD_EXPORT=y
 CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LN=y
-CONFIG_CMD_SLEEP=y
+# CONFIG_CMD_CP is not set
+# CONFIG_CMD_PWD is not set
 CONFIG_CMD_DHCP=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_MENU=y
-CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_CLK=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_TIME=y
+CONFIG_CMD_TFTP=y
+# CONFIG_CMD_CLEAR is not set
+# CONFIG_CMD_ECHO is not set
+# CONFIG_CMD_MEMCMP is not set
+# CONFIG_CMD_MEMCPY is not set
+# CONFIG_CMD_MEMSET is not set
 CONFIG_NET=y
 CONFIG_DRIVER_SERIAL_CADENCE=y
 CONFIG_DRIVER_NET_MACB=y
-# CONFIG_SPI is not set
+CONFIG_SPI_ZYNQ_QSPI=y
+CONFIG_MTD=y
+# CONFIG_MTD_OOB_DEVICE is not set
+CONFIG_MTD_M25P80=y
+CONFIG_MCI=y
+CONFIG_MCI_ARASAN=y
+CONFIG_EEPROM_AT25=y
 # CONFIG_PINCTRL is not set
 CONFIG_FS_TFTP=y
-CONFIG_DIGEST=y
+CONFIG_FS_FAT=y
+CONFIG_FS_FAT_WRITE=y
diff --git a/drivers/mci/Kconfig b/drivers/mci/Kconfig
index 80b3a2600..9f56bed3a 100644
--- a/drivers/mci/Kconfig
+++ b/drivers/mci/Kconfig
@@ -141,6 +141,7 @@ config MCI_TEGRA
 
 config MCI_ARASAN
 	bool "Arasan SDHCI Controller"
+	select MCI_SDHCI
 	help
 	  Enable this to support SD and MMC card read/write on systems with
 	  the Arasan SD3.0 / SDIO3.0 / eMMC4.51 host controller.
diff --git a/drivers/mci/arasan-sdhci.c b/drivers/mci/arasan-sdhci.c
index b43a4f8dd..0dd9382ae 100644
--- a/drivers/mci/arasan-sdhci.c
+++ b/drivers/mci/arasan-sdhci.c
@@ -278,7 +278,7 @@ static int arasan_sdhci_send_cmd(struct mci_host *mci, struct mci_cmd *cmd,
 
 	mask = SDHCI_INT_CMD_COMPLETE;
 	if (data)
-		mask |= SDHCI_INT_XFER_COMPLETE;
+		mask |= SDHCI_INT_DATA_AVAIL;   
 
 	sdhci_set_cmd_xfer_mode(&host->sdhci, cmd, data, false, &command, &xfer);
 

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             reply	other threads:[~2020-03-27  9:57 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-27  9:57 Michael Graichen [this message]
2020-03-30  5:39 ` Sascha Hauer

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