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From: Michael Graichen <michael.graichen@hotmail.com>
To: "barebox@lists.infradead.org" <barebox@lists.infradead.org>
Subject: [PATCH 5/7] Zedboard added FPGA and PCAP clock control
Date: Thu, 2 Apr 2020 08:21:38 +0000	[thread overview]
Message-ID: <DB7PR02MB4332B4E518B456DF86F01A6DABC60@DB7PR02MB4332.eurprd02.prod.outlook.com> (raw)

Added the configuration for FPGA an PCAP clock control

diff --git a/arch/arm/boards/avnet-zedboard/lowlevel.c b/arch/arm/boards/avnet-zedboard/lowlevel.c
index 6f05d934c..b8001fcf6 100644
--- a/arch/arm/boards/avnet-zedboard/lowlevel.c
+++ b/arch/arm/boards/avnet-zedboard/lowlevel.c
@@ -276,6 +276,15 @@ static void avnet_zedboard_ps7_init(void)
 
 	writel(0x00000001, 0xf8000B00);
 
+	/* FPGA Clock Control */
+	writel(0x00101400, 0xf8000170);
+	writel(0x00101400, 0xf8000180);
+	writel(0x00101400, 0xf8000190);
+	writel(0x00101400, 0xf80001a0);
+
+	/* PCAP Clock Control */
+	writel(0x00000501, 0xf8000168);
+
 	/* lock up. secure, secure */
 	writel(0x0000767B, ZYNQ_SLCR_LOCK);
 }
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                 reply	other threads:[~2020-04-02  8:21 UTC|newest]

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