From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from mail-am6eur05olkn2056.outbound.protection.outlook.com ([40.92.91.56] helo=EUR05-AM6-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jJv6b-00005H-Ih for barebox@lists.infradead.org; Thu, 02 Apr 2020 08:21:43 +0000 From: Michael Graichen Date: Thu, 2 Apr 2020 08:21:38 +0000 Message-ID: Content-Language: de-DE MIME-Version: 1.0 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "barebox" Errors-To: barebox-bounces+u.kleine-koenig=pengutronix.de@lists.infradead.org Subject: [PATCH 5/7] Zedboard added FPGA and PCAP clock control To: "barebox@lists.infradead.org" Added the configuration for FPGA an PCAP clock control diff --git a/arch/arm/boards/avnet-zedboard/lowlevel.c b/arch/arm/boards/avnet-zedboard/lowlevel.c index 6f05d934c..b8001fcf6 100644 --- a/arch/arm/boards/avnet-zedboard/lowlevel.c +++ b/arch/arm/boards/avnet-zedboard/lowlevel.c @@ -276,6 +276,15 @@ static void avnet_zedboard_ps7_init(void) writel(0x00000001, 0xf8000B00); + /* FPGA Clock Control */ + writel(0x00101400, 0xf8000170); + writel(0x00101400, 0xf8000180); + writel(0x00101400, 0xf8000190); + writel(0x00101400, 0xf80001a0); + + /* PCAP Clock Control */ + writel(0x00000501, 0xf8000168); + /* lock up. secure, secure */ writel(0x0000767B, ZYNQ_SLCR_LOCK); } _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox