* [PATCH 1/7] i.MX51: Allow to pass cpu clock to lowlevel init
@ 2012-04-12 16:20 Alexander Shiyan
2012-04-12 16:20 ` [PATCH 2/7] i.MX53: Move specific i.MX53 silicon definitions to imx53-regs.h Alexander Shiyan
` (5 more replies)
0 siblings, 6 replies; 13+ messages in thread
From: Alexander Shiyan @ 2012-04-12 16:20 UTC (permalink / raw)
To: barebox
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c | 2 +-
arch/arm/boards/freescale-mx51-pdk/board.c | 2 +-
arch/arm/mach-imx/imx51.c | 13 +++++++++++--
arch/arm/mach-imx/include/mach/imx5.h | 2 +-
4 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c b/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c
index 6de8f1f..06a994a 100644
--- a/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c
+++ b/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c
@@ -139,7 +139,7 @@ static int eukrea_cpuimx51_console_init(void)
{
mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx51_pads, ARRAY_SIZE(eukrea_cpuimx51_pads));
- imx51_init_lowlevel();
+ imx51_init_lowlevel(800);
writel(0, 0x73fa8228);
writel(0, 0x73fa822c);
diff --git a/arch/arm/boards/freescale-mx51-pdk/board.c b/arch/arm/boards/freescale-mx51-pdk/board.c
index 6e8b418..76d99ff 100644
--- a/arch/arm/boards/freescale-mx51-pdk/board.c
+++ b/arch/arm/boards/freescale-mx51-pdk/board.c
@@ -244,7 +244,7 @@ static int f3s_devices_init(void)
babbage_power_init();
console_flush();
- imx51_init_lowlevel();
+ imx51_init_lowlevel(800);
clock_notifier_call_chain();
armlinux_set_bootparams((void *)0x90000100);
diff --git a/arch/arm/mach-imx/imx51.c b/arch/arm/mach-imx/imx51.c
index 02704c1..4cfd03b 100644
--- a/arch/arm/mach-imx/imx51.c
+++ b/arch/arm/mach-imx/imx51.c
@@ -186,7 +186,7 @@ coredevice_initcall(imx51_boot_save_loc);
#define setup_pll_455(base) imx5_setup_pll((base), 455, (( 9 << 4) + ((2 - 1) << 0)), (48 - 1), 23)
#define setup_pll_216(base) imx5_setup_pll((base), 216, (( 6 << 4) + ((3 - 1) << 0)), ( 4 - 1), 3)
-void imx51_init_lowlevel(void)
+void imx51_init_lowlevel(unsigned int cpufreq_mhz)
{
void __iomem *ccm = (void __iomem *)MX51_CCM_BASE_ADDR;
u32 r;
@@ -220,7 +220,16 @@ void imx51_init_lowlevel(void)
/* Switch ARM to step clock */
writel(0x4, ccm + MX5_CCM_CCSR);
- setup_pll_800((void __iomem *)MX51_PLL1_BASE_ADDR);
+ switch (cpufreq_mhz) {
+ case 600:
+ setup_pll_600((void __iomem *)MX51_PLL1_BASE_ADDR);
+ break;
+ default:
+ /* Default maximum 800MHz */
+ setup_pll_800((void __iomem *)MX51_PLL1_BASE_ADDR);
+ break;
+ }
+
setup_pll_665((void __iomem *)MX51_PLL3_BASE_ADDR);
/* Switch peripheral to PLL 3 */
diff --git a/arch/arm/mach-imx/include/mach/imx5.h b/arch/arm/mach-imx/include/mach/imx5.h
index c33f75e..4c19d28 100644
--- a/arch/arm/mach-imx/include/mach/imx5.h
+++ b/arch/arm/mach-imx/include/mach/imx5.h
@@ -1,8 +1,8 @@
#ifndef __MACH_MX5_H
#define __MACH_MX5_H
+void imx51_init_lowlevel(unsigned int cpufreq_mhz);
void imx53_init_lowlevel(unsigned int cpufreq_mhz);
-void imx51_init_lowlevel(void);
void imx5_setup_pll(void __iomem *base, int freq, u32 op, u32 mfd, u32 mfn);
void imx5_init_lowlevel(void);
--
1.7.3.4
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 2/7] i.MX53: Move specific i.MX53 silicon definitions to imx53-regs.h
2012-04-12 16:20 [PATCH 1/7] i.MX51: Allow to pass cpu clock to lowlevel init Alexander Shiyan
@ 2012-04-12 16:20 ` Alexander Shiyan
2012-04-12 19:04 ` Eric Bénard
2012-04-12 16:20 ` [PATCH 3/7] i.MX51: Add iomux definitions for SDHC3 Alexander Shiyan
` (4 subsequent siblings)
5 siblings, 1 reply; 13+ messages in thread
From: Alexander Shiyan @ 2012-04-12 16:20 UTC (permalink / raw)
To: barebox
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
arch/arm/mach-imx/imx53.c | 6 +++---
arch/arm/mach-imx/include/mach/imx-regs.h | 5 -----
arch/arm/mach-imx/include/mach/imx53-regs.h | 5 +++++
3 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-imx/imx53.c b/arch/arm/mach-imx/imx53.c
index 8742c46..951e4c6 100644
--- a/arch/arm/mach-imx/imx53.c
+++ b/arch/arm/mach-imx/imx53.c
@@ -55,15 +55,15 @@ static int query_silicon_revision(void)
rev = readl(rom + SI_REV);
switch (rev) {
case 0x10:
- mx53_silicon_revision = IMX_CHIP_REV_1_0;
+ mx53_silicon_revision = MX53_CHIP_REV_1_0;
mx53_rev_string = "1.0";
break;
case 0x20:
- mx53_silicon_revision = IMX_CHIP_REV_2_0;
+ mx53_silicon_revision = MX53_CHIP_REV_2_0;
mx53_rev_string = "2.0";
break;
case 0x21:
- mx53_silicon_revision = IMX_CHIP_REV_2_1;
+ mx53_silicon_revision = MX53_CHIP_REV_2_1;
mx53_rev_string = "2.1";
break;
default:
diff --git a/arch/arm/mach-imx/include/mach/imx-regs.h b/arch/arm/mach-imx/include/mach/imx-regs.h
index 789397e..a272dda 100644
--- a/arch/arm/mach-imx/include/mach/imx-regs.h
+++ b/arch/arm/mach-imx/include/mach/imx-regs.h
@@ -105,9 +105,4 @@
#define GPIO_GIUS (1<<16)
-/* silicon revisions */
-#define IMX_CHIP_REV_1_0 0x10
-#define IMX_CHIP_REV_2_0 0x20
-#define IMX_CHIP_REV_2_1 0x21
-
#endif /* _IMX_REGS_H */
diff --git a/arch/arm/mach-imx/include/mach/imx53-regs.h b/arch/arm/mach-imx/include/mach/imx53-regs.h
index 8fefc54..065bf08 100644
--- a/arch/arm/mach-imx/include/mach/imx53-regs.h
+++ b/arch/arm/mach-imx/include/mach/imx53-regs.h
@@ -135,5 +135,10 @@
#define MX53_CS2_96MB_BASE_ADDR 0xF6000000
#define MX53_CS3_BASE_ADDR 0xF6000000
+/* silicon revisions specific to i.MX53 */
+#define MX53_CHIP_REV_1_0 0x10
+#define MX53_CHIP_REV_2_0 0x20
+#define MX53_CHIP_REV_2_1 0x21
+
#endif /* __MACH_IMX53_REGS_H */
--
1.7.3.4
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 3/7] i.MX51: Add iomux definitions for SDHC3
2012-04-12 16:20 [PATCH 1/7] i.MX51: Allow to pass cpu clock to lowlevel init Alexander Shiyan
2012-04-12 16:20 ` [PATCH 2/7] i.MX53: Move specific i.MX53 silicon definitions to imx53-regs.h Alexander Shiyan
@ 2012-04-12 16:20 ` Alexander Shiyan
2012-04-12 20:11 ` Sascha Hauer
2012-04-12 16:20 ` [PATCH 4/7] i.MX51: Add iomux definitions for GPIO3.0 Alexander Shiyan
` (3 subsequent siblings)
5 siblings, 1 reply; 13+ messages in thread
From: Alexander Shiyan @ 2012-04-12 16:20 UTC (permalink / raw)
To: barebox
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
arch/arm/mach-imx/include/mach/iomux-mx51.h | 13 +++++++++++++
1 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-imx/include/mach/iomux-mx51.h b/arch/arm/mach-imx/include/mach/iomux-mx51.h
index 872072e..bba9990 100644
--- a/arch/arm/mach-imx/include/mach/iomux-mx51.h
+++ b/arch/arm/mach-imx/include/mach/iomux-mx51.h
@@ -150,24 +150,37 @@
#define MX51_PAD_NANDF_CS7__NANDF_CS7 IOMUX_PAD(0x534, 0x14C, 0, 0x0, 0, NO_PAD_CTRL)
#define MX51_PAD_NANDF_CS7__FEC_TX_EN IOMUX_PAD(0x534, 0x14C, 1, 0x0, 0, MX51_FEC_PAD_CTRL)
+#define MX51_PAD_NANDF_CS7__SD3_CLK IOMUX_PAD(0x534, 0x14C, 5, 0x0, 0, MX51_SDHCI_PAD_CTRL | PAD_CTL_HYS)
#define MX51_PAD_NANDF_RDY_INT__NANDF_RDY_INT IOMUX_PAD(0x538, 0x150, 0, 0x938, 0, NO_PAD_CTRL)
#define MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK IOMUX_PAD(0x538, 0x150, 1, 0x974, 0, MX51_FEC_PAD_CTRL)
+#define MX51_PAD_NANDF_RDY_INT__SD3_CMD IOMUX_PAD(0x538, 0x150, 0x15, 0, 0, MX51_SDHCI_PAD_CTRL)
#define MX51_PAD_NANDF_D15__NANDF_D15 IOMUX_PAD(0x53C, 0x154, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_NANDF_D15__SD3_DATA7 IOMUX_PAD(0x53C, 0x154, 5, 0x0, 0, MX51_SDHCI_PAD_CTRL)
+
#define MX51_PAD_NANDF_D14__NANDF_D14 IOMUX_PAD(0x540, 0x158, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_NANDF_D14__SD3_DATA6 IOMUX_PAD(0x540, 0x158, 5, 0x0, 0, MX51_SDHCI_PAD_CTRL)
+
#define MX51_PAD_NANDF_D13__NANDF_D13 IOMUX_PAD(0x544, 0x15C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_NANDF_D13__SD3_DATA5 IOMUX_PAD(0x544, 0x15C, 5, 0x0, 0, MX51_SDHCI_PAD_CTRL)
+
#define MX51_PAD_NANDF_D12__NANDF_D12 IOMUX_PAD(0x548, 0x160, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_NANDF_D12__SD3_DATA4 IOMUX_PAD(0x548, 0x160, 5, 0x0, 0, MX51_SDHCI_PAD_CTRL)
#define MX51_PAD_NANDF_D11__NANDF_D11 IOMUX_PAD(0x54C, 0x164, 0, 0x0, 0, NO_PAD_CTRL)
#define MX51_PAD_NANDF_D11__FEC_RX_DV IOMUX_PAD(0x54C, 0x164, 2, 0x96c, 0, MX51_FEC_PAD_CTRL)
+#define MX51_PAD_NANDF_D11__SD3_DATA3 IOMUX_PAD(0x54C, 0x164, 5, 0x948, 1, MX51_SDHCI_PAD_CTRL)
#define MX51_PAD_NANDF_D10__NANDF_D10 IOMUX_PAD(0x550, 0x168, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_NANDF_D10__SD3_DATA2 IOMUX_PAD(0x550, 0x168, 5, 0x944, 1, MX51_SDHCI_PAD_CTRL)
#define MX51_PAD_NANDF_D9__NANDF_D9 IOMUX_PAD(0x554, 0x16C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_NANDF_D9__SD3_DATA1 IOMUX_PAD(0x554, 0x16C, 5, 0x940, 1, MX51_SDHCI_PAD_CTRL)
#define MX51_PAD_NANDF_D8__NANDF_D8 IOMUX_PAD(0x558, 0x170, 0, 0x0, 0, NO_PAD_CTRL)
#define MX51_PAD_NANDF_D8__FEC_TDATA0 IOMUX_PAD(0x558, 0x170, 2, 0x0, 0, MX51_FEC_PAD_CTRL)
+#define MX51_PAD_NANDF_D8__SD3_DATA0 IOMUX_PAD(0x558, 0x170, 5, 0x93c, 1, MX51_SDHCI_PAD_CTRL)
#define MX51_PAD_NANDF_D7__NANDF_D7 IOMUX_PAD(0x55C, 0x174, 0, 0x0, 0, NO_PAD_CTRL)
#define MX51_PAD_NANDF_D6__NANDF_D6 IOMUX_PAD(0x560, 0x178, 0, 0x0, 0, NO_PAD_CTRL)
--
1.7.3.4
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 4/7] i.MX51: Add iomux definitions for GPIO3.0
2012-04-12 16:20 [PATCH 1/7] i.MX51: Allow to pass cpu clock to lowlevel init Alexander Shiyan
2012-04-12 16:20 ` [PATCH 2/7] i.MX53: Move specific i.MX53 silicon definitions to imx53-regs.h Alexander Shiyan
2012-04-12 16:20 ` [PATCH 3/7] i.MX51: Add iomux definitions for SDHC3 Alexander Shiyan
@ 2012-04-12 16:20 ` Alexander Shiyan
2012-04-12 16:20 ` [PATCH 5/7] i.MX51: Add iomux definitions for I2C2 Alexander Shiyan
` (2 subsequent siblings)
5 siblings, 0 replies; 13+ messages in thread
From: Alexander Shiyan @ 2012-04-12 16:20 UTC (permalink / raw)
To: barebox
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
arch/arm/mach-imx/include/mach/iomux-mx51.h | 3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-imx/include/mach/iomux-mx51.h b/arch/arm/mach-imx/include/mach/iomux-mx51.h
index bba9990..cf39ef5 100644
--- a/arch/arm/mach-imx/include/mach/iomux-mx51.h
+++ b/arch/arm/mach-imx/include/mach/iomux-mx51.h
@@ -262,7 +262,10 @@
#define MX51_PAD_USBH1_DATA5__USBH1_DATA5 IOMUX_PAD(0x69C, 0x29C, 0, 0x0, 0, NO_PAD_CTRL)
#define MX51_PAD_USBH1_DATA6__USBH1_DATA6 IOMUX_PAD(0x6A0, 0x2A0, 0, 0x0, 0, NO_PAD_CTRL)
#define MX51_PAD_USBH1_DATA7__USBH1_DATA7 IOMUX_PAD(0x6A4, 0x2A4, 0, 0x0, 0, NO_PAD_CTRL)
+
#define MX51_PAD_DI1_PIN11__DI1_PIN11 IOMUX_PAD(0x6A8, 0x2A8, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DI1_PIN11__GPIO3_0 IOMUX_PAD(0x6A8, 0x2A8, 4, 0x0, 0, NO_PAD_CTRL)
+
#define MX51_PAD_DI1_PIN12__DI1_PIN12 IOMUX_PAD(0x6AC, 0x2AC, 0, 0x0, 0, NO_PAD_CTRL)
#define MX51_PAD_DI1_PIN13__DI1_PIN13 IOMUX_PAD(0x6B0, 0x2B0, 0, 0x0, 0, NO_PAD_CTRL)
#define MX51_PAD_DI1_D0_CS__DI1_D0_CS IOMUX_PAD(0x6B4, 0x2B4, 0, 0x0, 0, NO_PAD_CTRL)
--
1.7.3.4
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 5/7] i.MX51: Add iomux definitions for I2C2
2012-04-12 16:20 [PATCH 1/7] i.MX51: Allow to pass cpu clock to lowlevel init Alexander Shiyan
` (2 preceding siblings ...)
2012-04-12 16:20 ` [PATCH 4/7] i.MX51: Add iomux definitions for GPIO3.0 Alexander Shiyan
@ 2012-04-12 16:20 ` Alexander Shiyan
2012-04-12 16:20 ` [PATCH 6/7] i.MX51: Add PAD_CTL_HYS bit to SD_CLK pads Alexander Shiyan
2012-04-12 16:20 ` [PATCH 7/7] i.MX51: Add support for SDHC3 Alexander Shiyan
5 siblings, 0 replies; 13+ messages in thread
From: Alexander Shiyan @ 2012-04-12 16:20 UTC (permalink / raw)
To: barebox
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
arch/arm/mach-imx/include/mach/iomux-mx51.h | 5 +++++
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-imx/include/mach/iomux-mx51.h b/arch/arm/mach-imx/include/mach/iomux-mx51.h
index cf39ef5..cf80693 100644
--- a/arch/arm/mach-imx/include/mach/iomux-mx51.h
+++ b/arch/arm/mach-imx/include/mach/iomux-mx51.h
@@ -357,8 +357,13 @@
#define MX51_PAD_SD2_DATA1__SD2_DATA1 IOMUX_PAD(0x7C8, 0x3C0, 0x10, 0x0, 0, MX51_SDHCI_PAD_CTRL)
#define MX51_PAD_SD2_DATA2__SD2_DATA2 IOMUX_PAD(0x7CC, 0x3C4, 0x10, 0x0, 0, MX51_SDHCI_PAD_CTRL)
#define MX51_PAD_SD2_DATA3__SD2_DATA3 IOMUX_PAD(0x7D0, 0x3C8, 0x10, 0x0, 0, MX51_SDHCI_PAD_CTRL)
+
#define MX51_PAD_GPIO1_2__GPIO1_2 IOMUX_PAD(0x7D4, 0x3CC, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO1_2__I2C2_SCL IOMUX_PAD(0x7D4, 0x3CC, 0x12, 0x9b8, 3, NO_PAD_CTRL)
+
#define MX51_PAD_GPIO1_3__GPIO1_3 IOMUX_PAD(0x7D8, 0x3D0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO1_3__I2C2_SDA IOMUX_PAD(0x7D8, 0x3D0, 0x12, 0x9bc, 3, NO_PAD_CTRL)
+
#define MX51_PAD_PMIC_INT_REQ__PMIC_INT_REQ IOMUX_PAD(0x7FC, 0x3D4, 0, 0x0, 0, NO_PAD_CTRL)
#define MX51_PAD_GPIO1_4__GPIO1_4 IOMUX_PAD(0x804, 0x3D8, 0, 0x0, 0, NO_PAD_CTRL)
#define MX51_PAD_GPIO1_5__GPIO1_5 IOMUX_PAD(0x808, 0x3DC, 0, 0x0, 0, NO_PAD_CTRL)
--
1.7.3.4
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 6/7] i.MX51: Add PAD_CTL_HYS bit to SD_CLK pads
2012-04-12 16:20 [PATCH 1/7] i.MX51: Allow to pass cpu clock to lowlevel init Alexander Shiyan
` (3 preceding siblings ...)
2012-04-12 16:20 ` [PATCH 5/7] i.MX51: Add iomux definitions for I2C2 Alexander Shiyan
@ 2012-04-12 16:20 ` Alexander Shiyan
2012-04-12 19:05 ` Eric Bénard
2012-04-12 16:20 ` [PATCH 7/7] i.MX51: Add support for SDHC3 Alexander Shiyan
5 siblings, 1 reply; 13+ messages in thread
From: Alexander Shiyan @ 2012-04-12 16:20 UTC (permalink / raw)
To: barebox
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
arch/arm/mach-imx/include/mach/iomux-mx51.h | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-imx/include/mach/iomux-mx51.h b/arch/arm/mach-imx/include/mach/iomux-mx51.h
index cf80693..ccc4c21 100644
--- a/arch/arm/mach-imx/include/mach/iomux-mx51.h
+++ b/arch/arm/mach-imx/include/mach/iomux-mx51.h
@@ -344,7 +344,7 @@
#define MX51_PAD_DISP2_DAT15__DISP2_DAT15 IOMUX_PAD(0x798, 0x390, 0, 0x0, 0, NO_PAD_CTRL)
#define MX51_PAD_DISP2_DAT15__FEC_TDATA0 IOMUX_PAD(0x798, 0x390, 2, 0x0, 0, MX51_FEC_PAD_CTRL)
#define MX51_PAD_SD1_CMD__SD1_CMD IOMUX_PAD(0x79C, 0x394, 0x10, 0x0, 0, MX51_SDHCI_PAD_CTRL)
-#define MX51_PAD_SD1_CLK__SD1_CLK IOMUX_PAD(0x7A0, 0x398, 0x10, 0x0, 0, MX51_SDHCI_PAD_CTRL)
+#define MX51_PAD_SD1_CLK__SD1_CLK IOMUX_PAD(0x7A0, 0x398, 0x10, 0x0, 0, MX51_SDHCI_PAD_CTRL | PAD_CTL_HYS)
#define MX51_PAD_SD1_DATA0__SD1_DATA0 IOMUX_PAD(0x7A4, 0x39C, 0x10, 0x0, 0, MX51_SDHCI_PAD_CTRL)
#define MX51_PAD_SD1_DATA1__SD1_DATA1 IOMUX_PAD(0x7A8, 0x3A0, 0x10, 0x0, 0, MX51_SDHCI_PAD_CTRL)
#define MX51_PAD_SD1_DATA2__SD1_DATA2 IOMUX_PAD(0x7AC, 0x3A4, 0x10, 0x0, 0, MX51_SDHCI_PAD_CTRL)
@@ -352,7 +352,7 @@
#define MX51_PAD_GPIO1_0__GPIO1_0 IOMUX_PAD(0x7B4, 0x3AC, 0, 0x0, 0, NO_PAD_CTRL)
#define MX51_PAD_GPIO1_1__GPIO1_1 IOMUX_PAD(0x7B8, 0x3B0, 0, 0x0, 0, NO_PAD_CTRL)
#define MX51_PAD_SD2_CMD__SD2_CMD IOMUX_PAD(0x7BC, 0x3B4, 0x10, 0x0, 0, MX51_SDHCI_PAD_CTRL)
-#define MX51_PAD_SD2_CLK__SD2_CLK IOMUX_PAD(0x7C0, 0x3B8, 0x10, 0x0, 0, MX51_SDHCI_PAD_CTRL)
+#define MX51_PAD_SD2_CLK__SD2_CLK IOMUX_PAD(0x7C0, 0x3B8, 0x10, 0x0, 0, MX51_SDHCI_PAD_CTRL | PAD_CTL_HYS)
#define MX51_PAD_SD2_DATA0__SD2_DATA0 IOMUX_PAD(0x7C4, 0x3BC, 0x10, 0x0, 0, MX51_SDHCI_PAD_CTRL)
#define MX51_PAD_SD2_DATA1__SD2_DATA1 IOMUX_PAD(0x7C8, 0x3C0, 0x10, 0x0, 0, MX51_SDHCI_PAD_CTRL)
#define MX51_PAD_SD2_DATA2__SD2_DATA2 IOMUX_PAD(0x7CC, 0x3C4, 0x10, 0x0, 0, MX51_SDHCI_PAD_CTRL)
--
1.7.3.4
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 7/7] i.MX51: Add support for SDHC3
2012-04-12 16:20 [PATCH 1/7] i.MX51: Allow to pass cpu clock to lowlevel init Alexander Shiyan
` (4 preceding siblings ...)
2012-04-12 16:20 ` [PATCH 6/7] i.MX51: Add PAD_CTL_HYS bit to SD_CLK pads Alexander Shiyan
@ 2012-04-12 16:20 ` Alexander Shiyan
5 siblings, 0 replies; 13+ messages in thread
From: Alexander Shiyan @ 2012-04-12 16:20 UTC (permalink / raw)
To: barebox
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
arch/arm/mach-imx/include/mach/devices-imx51.h | 5 +++++
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-imx/include/mach/devices-imx51.h b/arch/arm/mach-imx/include/mach/devices-imx51.h
index 27fcaa2..6218299 100644
--- a/arch/arm/mach-imx/include/mach/devices-imx51.h
+++ b/arch/arm/mach-imx/include/mach/devices-imx51.h
@@ -57,6 +57,11 @@ static inline struct device_d *imx51_add_mmc1(struct esdhc_platform_data *pdata)
return imx_add_esdhc((void *)MX51_MMC_SDHC2_BASE_ADDR, 1, pdata);
}
+static inline struct device_d *imx51_add_mmc2(struct esdhc_platform_data *pdata)
+{
+ return imx_add_esdhc((void *)MX51_MMC_SDHC3_BASE_ADDR, 2, pdata);
+}
+
static inline struct device_d *imx51_add_nand(struct imx_nand_platform_data *pdata)
{
struct resource res[] = {
--
1.7.3.4
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 2/7] i.MX53: Move specific i.MX53 silicon definitions to imx53-regs.h
2012-04-12 16:20 ` [PATCH 2/7] i.MX53: Move specific i.MX53 silicon definitions to imx53-regs.h Alexander Shiyan
@ 2012-04-12 19:04 ` Eric Bénard
2012-04-12 19:47 ` Sascha Hauer
2012-04-12 19:49 ` Re[2]: " Alexander Shiyan
0 siblings, 2 replies; 13+ messages in thread
From: Eric Bénard @ 2012-04-12 19:04 UTC (permalink / raw)
To: barebox
Le Thu, 12 Apr 2012 20:20:19 +0400,
Alexander Shiyan <shc_work@mail.ru> a écrit :
>
> Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
> ---
> arch/arm/mach-imx/imx53.c | 6 +++---
> arch/arm/mach-imx/include/mach/imx-regs.h | 5 -----
> arch/arm/mach-imx/include/mach/imx53-regs.h | 5 +++++
> 3 files changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm/mach-imx/imx53.c b/arch/arm/mach-imx/imx53.c
> index 8742c46..951e4c6 100644
> --- a/arch/arm/mach-imx/imx53.c
> +++ b/arch/arm/mach-imx/imx53.c
> @@ -55,15 +55,15 @@ static int query_silicon_revision(void)
> rev = readl(rom + SI_REV);
> switch (rev) {
> case 0x10:
> - mx53_silicon_revision = IMX_CHIP_REV_1_0;
> + mx53_silicon_revision = MX53_CHIP_REV_1_0;
> mx53_rev_string = "1.0";
> break;
> case 0x20:
> - mx53_silicon_revision = IMX_CHIP_REV_2_0;
> + mx53_silicon_revision = MX53_CHIP_REV_2_0;
> mx53_rev_string = "2.0";
> break;
> case 0x21:
> - mx53_silicon_revision = IMX_CHIP_REV_2_1;
> + mx53_silicon_revision = MX53_CHIP_REV_2_1;
> mx53_rev_string = "2.1";
> break;
> default:
> diff --git a/arch/arm/mach-imx/include/mach/imx-regs.h b/arch/arm/mach-imx/include/mach/imx-regs.h
> index 789397e..a272dda 100644
> --- a/arch/arm/mach-imx/include/mach/imx-regs.h
> +++ b/arch/arm/mach-imx/include/mach/imx-regs.h
> @@ -105,9 +105,4 @@
>
> #define GPIO_GIUS (1<<16)
>
> -/* silicon revisions */
> -#define IMX_CHIP_REV_1_0 0x10
> -#define IMX_CHIP_REV_2_0 0x20
> -#define IMX_CHIP_REV_2_1 0x21
> -
> #endif /* _IMX_REGS_H */
> diff --git a/arch/arm/mach-imx/include/mach/imx53-regs.h b/arch/arm/mach-imx/include/mach/imx53-regs.h
> index 8fefc54..065bf08 100644
> --- a/arch/arm/mach-imx/include/mach/imx53-regs.h
> +++ b/arch/arm/mach-imx/include/mach/imx53-regs.h
> @@ -135,5 +135,10 @@
> #define MX53_CS2_96MB_BASE_ADDR 0xF6000000
> #define MX53_CS3_BASE_ADDR 0xF6000000
>
> +/* silicon revisions specific to i.MX53 */
> +#define MX53_CHIP_REV_1_0 0x10
> +#define MX53_CHIP_REV_2_0 0x20
> +#define MX53_CHIP_REV_2_1 0x21
> +
> #endif /* __MACH_IMX53_REGS_H */
>
The goal was to move chip revision to imx-regs.h and remove them from
other files (as MX25/35/51/53 seems to share the same pattern for chip
revision)
Eric
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 6/7] i.MX51: Add PAD_CTL_HYS bit to SD_CLK pads
2012-04-12 16:20 ` [PATCH 6/7] i.MX51: Add PAD_CTL_HYS bit to SD_CLK pads Alexander Shiyan
@ 2012-04-12 19:05 ` Eric Bénard
2012-04-12 19:44 ` Re[2]: " Alexander Shiyan
0 siblings, 1 reply; 13+ messages in thread
From: Eric Bénard @ 2012-04-12 19:05 UTC (permalink / raw)
To: barebox
Hi,
Le Thu, 12 Apr 2012 20:20:23 +0400,
Alexander Shiyan <shc_work@mail.ru> a écrit :
> -#define MX51_PAD_SD1_CLK__SD1_CLK IOMUX_PAD(0x7A0, 0x398, 0x10, 0x0, 0, MX51_SDHCI_PAD_CTRL)
> +#define MX51_PAD_SD1_CLK__SD1_CLK IOMUX_PAD(0x7A0, 0x398, 0x10, 0x0, 0, MX51_SDHCI_PAD_CTRL | PAD_CTL_HYS)
why is this change needed ?
Eric
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re[2]: [PATCH 6/7] i.MX51: Add PAD_CTL_HYS bit to SD_CLK pads
2012-04-12 19:05 ` Eric Bénard
@ 2012-04-12 19:44 ` Alexander Shiyan
0 siblings, 0 replies; 13+ messages in thread
From: Alexander Shiyan @ 2012-04-12 19:44 UTC (permalink / raw)
To: barebox
Hello.
> Alexander Shiyan <shc_work@mail.ru> a écrit :
> > -#define MX51_PAD_SD1_CLK__SD1_CLK IOMUX_PAD(0x7A0, 0x398, 0x10, 0x0, 0, MX51_SDHCI_PAD_CTRL)
> > +#define MX51_PAD_SD1_CLK__SD1_CLK IOMUX_PAD(0x7A0, 0x398, 0x10, 0x0, 0, MX51_SDHCI_PAD_CTRL | PAD_CTL_HYS)
> why is this change needed ?
Of course, the hysteresis is used to input pins, but I noticed that the shape of the output signal CLK is improved by setting
this bit. Especially noticeable at high speed. Perhaps this is especially the layout.
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 2/7] i.MX53: Move specific i.MX53 silicon definitions to imx53-regs.h
2012-04-12 19:04 ` Eric Bénard
@ 2012-04-12 19:47 ` Sascha Hauer
2012-04-12 19:49 ` Re[2]: " Alexander Shiyan
1 sibling, 0 replies; 13+ messages in thread
From: Sascha Hauer @ 2012-04-12 19:47 UTC (permalink / raw)
To: Eric Bénard; +Cc: barebox
On Thu, Apr 12, 2012 at 09:04:15PM +0200, Eric Bénard wrote:
> Le Thu, 12 Apr 2012 20:20:19 +0400,
> Alexander Shiyan <shc_work@mail.ru> a écrit :
>
> >
> > +/* silicon revisions specific to i.MX53 */
> > +#define MX53_CHIP_REV_1_0 0x10
> > +#define MX53_CHIP_REV_2_0 0x20
> > +#define MX53_CHIP_REV_2_1 0x21
> > +
> > #endif /* __MACH_IMX53_REGS_H */
> >
>
> The goal was to move chip revision to imx-regs.h and remove them from
> other files (as MX25/35/51/53 seems to share the same pattern for chip
> revision)
Or to put it differently you should instead let i.MX51 use the
IMX_CHIP_REV_* macros instead of MX51_CHIP_REV_*
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re[2]: [PATCH 2/7] i.MX53: Move specific i.MX53 silicon definitions to imx53-regs.h
2012-04-12 19:04 ` Eric Bénard
2012-04-12 19:47 ` Sascha Hauer
@ 2012-04-12 19:49 ` Alexander Shiyan
1 sibling, 0 replies; 13+ messages in thread
From: Alexander Shiyan @ 2012-04-12 19:49 UTC (permalink / raw)
To: barebox
Hello.
...
> > +/* silicon revisions specific to i.MX53 */
> > +#define MX53_CHIP_REV_1_0 0x10
> > +#define MX53_CHIP_REV_2_0 0x20
> > +#define MX53_CHIP_REV_2_1 0x21
> > +
> > #endif /* __MACH_IMX53_REGS_H */
> The goal was to move chip revision to imx-regs.h and remove them from
> other files (as MX25/35/51/53 seems to share the same pattern for chip
> revision)
Maybe you're right.
Then we need to add definitions for the MX51 versions in the same style?
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 3/7] i.MX51: Add iomux definitions for SDHC3
2012-04-12 16:20 ` [PATCH 3/7] i.MX51: Add iomux definitions for SDHC3 Alexander Shiyan
@ 2012-04-12 20:11 ` Sascha Hauer
0 siblings, 0 replies; 13+ messages in thread
From: Sascha Hauer @ 2012-04-12 20:11 UTC (permalink / raw)
To: Alexander Shiyan; +Cc: barebox
On Thu, Apr 12, 2012 at 08:20:20PM +0400, Alexander Shiyan wrote:
>
> Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
> ---
> arch/arm/mach-imx/include/mach/iomux-mx51.h | 13 +++++++++++++
We should not hand-patch these files. It's much more convenient to keep
them in sync with the kernel. Please check the series I just sent out,
they (hopefully) contain the defines you need.
Sascha
> 1 files changed, 13 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-imx/include/mach/iomux-mx51.h b/arch/arm/mach-imx/include/mach/iomux-mx51.h
> index 872072e..bba9990 100644
> --- a/arch/arm/mach-imx/include/mach/iomux-mx51.h
> +++ b/arch/arm/mach-imx/include/mach/iomux-mx51.h
> @@ -150,24 +150,37 @@
>
> #define MX51_PAD_NANDF_CS7__NANDF_CS7 IOMUX_PAD(0x534, 0x14C, 0, 0x0, 0, NO_PAD_CTRL)
> #define MX51_PAD_NANDF_CS7__FEC_TX_EN IOMUX_PAD(0x534, 0x14C, 1, 0x0, 0, MX51_FEC_PAD_CTRL)
> +#define MX51_PAD_NANDF_CS7__SD3_CLK IOMUX_PAD(0x534, 0x14C, 5, 0x0, 0, MX51_SDHCI_PAD_CTRL | PAD_CTL_HYS)
>
> #define MX51_PAD_NANDF_RDY_INT__NANDF_RDY_INT IOMUX_PAD(0x538, 0x150, 0, 0x938, 0, NO_PAD_CTRL)
> #define MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK IOMUX_PAD(0x538, 0x150, 1, 0x974, 0, MX51_FEC_PAD_CTRL)
> +#define MX51_PAD_NANDF_RDY_INT__SD3_CMD IOMUX_PAD(0x538, 0x150, 0x15, 0, 0, MX51_SDHCI_PAD_CTRL)
>
> #define MX51_PAD_NANDF_D15__NANDF_D15 IOMUX_PAD(0x53C, 0x154, 0, 0x0, 0, NO_PAD_CTRL)
> +#define MX51_PAD_NANDF_D15__SD3_DATA7 IOMUX_PAD(0x53C, 0x154, 5, 0x0, 0, MX51_SDHCI_PAD_CTRL)
> +
> #define MX51_PAD_NANDF_D14__NANDF_D14 IOMUX_PAD(0x540, 0x158, 0, 0x0, 0, NO_PAD_CTRL)
> +#define MX51_PAD_NANDF_D14__SD3_DATA6 IOMUX_PAD(0x540, 0x158, 5, 0x0, 0, MX51_SDHCI_PAD_CTRL)
> +
> #define MX51_PAD_NANDF_D13__NANDF_D13 IOMUX_PAD(0x544, 0x15C, 0, 0x0, 0, NO_PAD_CTRL)
> +#define MX51_PAD_NANDF_D13__SD3_DATA5 IOMUX_PAD(0x544, 0x15C, 5, 0x0, 0, MX51_SDHCI_PAD_CTRL)
> +
> #define MX51_PAD_NANDF_D12__NANDF_D12 IOMUX_PAD(0x548, 0x160, 0, 0x0, 0, NO_PAD_CTRL)
> +#define MX51_PAD_NANDF_D12__SD3_DATA4 IOMUX_PAD(0x548, 0x160, 5, 0x0, 0, MX51_SDHCI_PAD_CTRL)
>
> #define MX51_PAD_NANDF_D11__NANDF_D11 IOMUX_PAD(0x54C, 0x164, 0, 0x0, 0, NO_PAD_CTRL)
> #define MX51_PAD_NANDF_D11__FEC_RX_DV IOMUX_PAD(0x54C, 0x164, 2, 0x96c, 0, MX51_FEC_PAD_CTRL)
> +#define MX51_PAD_NANDF_D11__SD3_DATA3 IOMUX_PAD(0x54C, 0x164, 5, 0x948, 1, MX51_SDHCI_PAD_CTRL)
>
> #define MX51_PAD_NANDF_D10__NANDF_D10 IOMUX_PAD(0x550, 0x168, 0, 0x0, 0, NO_PAD_CTRL)
> +#define MX51_PAD_NANDF_D10__SD3_DATA2 IOMUX_PAD(0x550, 0x168, 5, 0x944, 1, MX51_SDHCI_PAD_CTRL)
>
> #define MX51_PAD_NANDF_D9__NANDF_D9 IOMUX_PAD(0x554, 0x16C, 0, 0x0, 0, NO_PAD_CTRL)
> +#define MX51_PAD_NANDF_D9__SD3_DATA1 IOMUX_PAD(0x554, 0x16C, 5, 0x940, 1, MX51_SDHCI_PAD_CTRL)
>
> #define MX51_PAD_NANDF_D8__NANDF_D8 IOMUX_PAD(0x558, 0x170, 0, 0x0, 0, NO_PAD_CTRL)
> #define MX51_PAD_NANDF_D8__FEC_TDATA0 IOMUX_PAD(0x558, 0x170, 2, 0x0, 0, MX51_FEC_PAD_CTRL)
> +#define MX51_PAD_NANDF_D8__SD3_DATA0 IOMUX_PAD(0x558, 0x170, 5, 0x93c, 1, MX51_SDHCI_PAD_CTRL)
>
> #define MX51_PAD_NANDF_D7__NANDF_D7 IOMUX_PAD(0x55C, 0x174, 0, 0x0, 0, NO_PAD_CTRL)
> #define MX51_PAD_NANDF_D6__NANDF_D6 IOMUX_PAD(0x560, 0x178, 0, 0x0, 0, NO_PAD_CTRL)
> --
> 1.7.3.4
>
>
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
>
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2012-04-12 20:11 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2012-04-12 16:20 [PATCH 1/7] i.MX51: Allow to pass cpu clock to lowlevel init Alexander Shiyan
2012-04-12 16:20 ` [PATCH 2/7] i.MX53: Move specific i.MX53 silicon definitions to imx53-regs.h Alexander Shiyan
2012-04-12 19:04 ` Eric Bénard
2012-04-12 19:47 ` Sascha Hauer
2012-04-12 19:49 ` Re[2]: " Alexander Shiyan
2012-04-12 16:20 ` [PATCH 3/7] i.MX51: Add iomux definitions for SDHC3 Alexander Shiyan
2012-04-12 20:11 ` Sascha Hauer
2012-04-12 16:20 ` [PATCH 4/7] i.MX51: Add iomux definitions for GPIO3.0 Alexander Shiyan
2012-04-12 16:20 ` [PATCH 5/7] i.MX51: Add iomux definitions for I2C2 Alexander Shiyan
2012-04-12 16:20 ` [PATCH 6/7] i.MX51: Add PAD_CTL_HYS bit to SD_CLK pads Alexander Shiyan
2012-04-12 19:05 ` Eric Bénard
2012-04-12 19:44 ` Re[2]: " Alexander Shiyan
2012-04-12 16:20 ` [PATCH 7/7] i.MX51: Add support for SDHC3 Alexander Shiyan
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox