Re: [PATCH 0/6] mci: rockchip-dwcmshc: add HS200 support

["Sascha Hauer" <s.hauer@pengutronix.de>]

On 2026-05-07 09:47, Ahmad Fatoum wrote:
> Hi,
> 
> On 5/7/26 9:02 AM, Sascha Hauer wrote:
> > At least on RK3588 the dwcmshc core doesn't have an internal clock
> > divider, we fully rely on the clock tree to configure the MMC clock.
> > By default the clock comes from the 24MHz oscillator. For higher MMC
> > clocks we have to reparent to a PLL clock, but if we do this once the
> > 6bit divider iss not enough to scale down to the 400kHz MMC
> > initialization clock. This means we must dynamically reparent the clock.
> > This series adds support for finding the best divider/mux combination
> > for composite clocks.
> > 
> > This series also adds some fixes to the dwcmshc driver which used to
> > timeout on writing sometimes.
> 
> \o/
> 
> How much faster was the reading now in your testing?

I now reach 120MB/s compared to 20MB/s before.

Sascha

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