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From: "Luca Ceresoli" <list@lucaceresoli.net>
To: barebox@lists.infradead.org
Subject: Re: OMAP 3530 arch_shutdown "undefined instruction"
Date: Tue,  8 Jun 2010 10:02:44 +0200	[thread overview]
Message-ID: <L3OROK$8E14E73C17D97B7C877E590EED33976C@aruba.it> (raw)

Orjan Friberg wrote:> On 2010-05-27 11:31, Sascha Hauer wrote:
> > Seems this does not work on Cortex Processors. Can you try replacing
> > this with the following please:
> >
> > 	asm volatile (
> > 		"bl __mmu_cache_flush;"
> > 		"bl __mmu_cache_off;"
> > 		:
> > 		:
> > 		: "r0", "r1", "r2", "r3", "r6", "r10", "r12", "cc", "memory"
> > 	);
> 
> Thanks, this seems to work fine (in the sense that I can load and run a 
> second stage bootloader; I haven't tried verifying what happens with the 
> I and D cache).

Works for me as well.
Is it going to be committed?

Thanks,
Luca



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             reply	other threads:[~2010-06-08  8:09 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-06-08  8:02 Luca Ceresoli [this message]
2010-06-10 12:22 ` Sascha Hauer
  -- strict thread matches above, loose matches on Subject: below --
2010-05-26 14:48 Orjan Friberg
2010-05-27  9:31 ` Sascha Hauer
2010-05-27 11:03   ` Orjan Friberg

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