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From: "Barbier, Renaud" <>
To: Sascha Hauer <>
Cc: Ahmad Fatoum <>,
	Barebox List <>
Subject: RE: NXP Layerscape
Date: Tue, 15 Jun 2021 19:02:03 +0000	[thread overview]
Message-ID: <> (raw)
In-Reply-To: <>

>  09570604 10000000

> This is the weird one. The QSPI read data is memory mapped in some SRAM where it is directly executed. 
So if  I understand you correctly both the PBI and barebox PBL got mapped to the SRAM (which I guess may be the OCRAM1 if i refer to the address above 0x10000000) and get executed sequentially.

Based on U-boot, RCW+PBI (at 0x40000000) which specifies 09570604 40100000 (address of U-boot), I would have thought that the address needed to be the exact start address of the barebox PBL in QSPI. Apparently not. 

So If I burn the image barebox-ls1046ardb-qspi.image at address 0x40000000 (start of QSPI flash) by using U-boot, it shall boot on power on.


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      reply	other threads:[~2021-06-15 22:04 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-10 13:49 Barbier, Renaud
2021-06-10 14:09 ` Ahmad Fatoum
     [not found]   ` <>
     [not found]     ` <>
     [not found]       ` <>
2021-06-10 16:35         ` Ahmad Fatoum
     [not found]           ` <>
2021-06-10 16:50             ` Ahmad Fatoum
     [not found]       ` <>
2021-06-11  8:29         ` Ahmad Fatoum
2021-06-10 17:08   ` Barbier, Renaud
2021-06-14 15:16   ` Barbier, Renaud
2021-06-15  8:49     ` Sascha Hauer
2021-06-15 19:02       ` Barbier, Renaud [this message]

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