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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: pliops.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PR3P195MB0555.EURP195.PROD.OUTLOOK.COM X-MS-Exchange-CrossTenant-Network-Message-Id: b11c30a4-c3a9-46ae-124c-08db627ad2be X-MS-Exchange-CrossTenant-originalarrivaltime: 01 Jun 2023 08:33:06.4182 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 40fe8f47-55ac-403a-a5ab-1be3dd209cf8 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: N50PVFm+Us6/FhraMbtddQOVbGQMjVQDfx9mdkPgengLcfdlNAXy54+dCM6oehOuipDkayd8K24XFbHbALLQeQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9P195MB1029 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230601_013314_388914_E7D8A245 X-CRM114-Status: GOOD ( 19.88 ) X-BeenThere: barebox@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "barebox" X-SA-Exim-Connect-IP: 2607:7c80:54:3::133 X-SA-Exim-Mail-From: barebox-bounces+lore=pengutronix.de@lists.infradead.org X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on metis.ext.pengutronix.de X-Spam-Level: X-Spam-Status: No, score=-4.9 required=4.0 tests=AWL,BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED,SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE, URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.2 Subject: RE: [PATCH RFT] ARM64: cpu: support 64-bit stack top in ENTRY_FUNCTION_WITHSTACK X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on metis.ext.pengutronix.de) Hi Ahmad, Thanks for the patch. I have checked it and can verify it is working correctly. Cheers, Lior. > -----Original Message----- > From: Ahmad Fatoum > Sent: Wednesday, May 31, 2023 8:52 PM > To: barebox@lists.infradead.org > Cc: Lior Weintraub ; Ahmad Fatoum > > Subject: [PATCH RFT] ARM64: cpu: support 64-bit stack top in > ENTRY_FUNCTION_WITHSTACK >=20 > CAUTION: External Sender >=20 > ENTRY_FUNCTION_WITHSTACK was written with the naive assumption that > there will always be some memory in the first 32-bit of the address > space to be used as early stack. There are SoCs out there though with > sole on-chip SRAM > 4G. Accommodate this by accepting full 64-bit stack > pointers in ENTRY_FUNCTION_WITHSTACK. >=20 > Signed-off-by: Ahmad Fatoum > --- > arch/arm/cpu/head_64.S | 2 +- > arch/arm/include/asm/barebox-arm.h | 2 +- > arch/arm/lib/pbl.lds.S | 7 ++++--- > include/asm-generic/pointer.h | 2 ++ > 4 files changed, 8 insertions(+), 5 deletions(-) >=20 > diff --git a/arch/arm/cpu/head_64.S b/arch/arm/cpu/head_64.S > index 398c4d3471e0..546efc263a06 100644 > --- a/arch/arm/cpu/head_64.S > +++ b/arch/arm/cpu/head_64.S > @@ -11,7 +11,7 @@ > ENTRY(__barebox_arm64_head) > nop > adr x9, __pbl_board_stack_top > - ldr w9, [x9] > + ldr x9, [x9] > cbz x9, 1f > mov sp, x9 > 1: > diff --git a/arch/arm/include/asm/barebox-arm.h > b/arch/arm/include/asm/barebox-arm.h > index eb31ca278821..aceb7fdf74f8 100644 > --- a/arch/arm/include/asm/barebox-arm.h > +++ b/arch/arm/include/asm/barebox-arm.h > @@ -158,7 +158,7 @@ void __barebox_arm64_head(ulong x0, ulong x1, > ulong x2); > (ulong r0, ulong r1, ulong r2) \ > { \ > static __section(.pbl_board_stack_top_##name) \ > - const u32 __stack_top =3D (stack_top); = \ > + const ulong __stack_top =3D (stack_top); = \ > __keep_symbolref(__barebox_arm64_head); \ > __keep_symbolref(__stack_top); \ > __##name(r0, r1, r2); \ > diff --git a/arch/arm/lib/pbl.lds.S b/arch/arm/lib/pbl.lds.S > index 114ec7bc8195..2b4b1d6a9513 100644 > --- a/arch/arm/lib/pbl.lds.S > +++ b/arch/arm/lib/pbl.lds.S > @@ -4,6 +4,7 @@ > #include > #include > #include > +#include >=20 > #ifdef CONFIG_PBL_RELOCATABLE > #define BASE 0x0 > @@ -44,14 +45,14 @@ SECTIONS > . =3D ALIGN(4); > .rodata : { *(.rodata*) } >=20 > - . =3D ALIGN(4); > + . =3D ALIGN(ASM_SZPTR); > __pbl_board_stack_top =3D .; > .rodata.pbl_board_stack_top : { > *(.pbl_board_stack_top_*) > /* Dummy for when BootROM sets up usable stack */ > - LONG(0x00000000); > + ASM_LD_PTR(0x00000000) > } > - ASSERT(. - __pbl_board_stack_top <=3D 8, "Only One PBL per Image > allowed") > + ASSERT(. - __pbl_board_stack_top <=3D 2 * ASM_SZPTR, "Only One PB= L per > Image allowed") >=20 > .barebox_imd : { BAREBOX_IMD } >=20 > diff --git a/include/asm-generic/pointer.h b/include/asm-generic/pointer.= h > index 8b9600b02939..89817ce59ebc 100644 > --- a/include/asm-generic/pointer.h > +++ b/include/asm-generic/pointer.h > @@ -8,6 +8,7 @@ > #define ASM_PTR .quad > #define ASM_SZPTR 8 > #define ASM_LGPTR 3 > +#define ASM_LD_PTR(x) QUAD(x) > #else > #define ASM_PTR ".quad" > #define ASM_SZPTR "8" > @@ -18,6 +19,7 @@ > #define ASM_PTR .word > #define ASM_SZPTR 4 > #define ASM_LGPTR 2 > +#define ASM_LD_PTR(x) LONG(x) > #else > #define ASM_PTR ".word" > #define ASM_SZPTR "4" > -- > 2.39.2