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From: Sascha Hauer <s.hauer@pengutronix.de>
To: Marco Felsch <m.felsch@pengutronix.de>
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH v2 2/2] ARM: i.MX8M: add support to handle ROM SError ERR050350
Date: Mon, 17 Jun 2024 08:49:51 +0200	[thread overview]
Message-ID: <Zm_cj2rCcwPDDblA@pengutronix.de> (raw)
In-Reply-To: <20240613130659.165278-2-m.felsch@pengutronix.de>

On Thu, Jun 13, 2024 at 03:06:59PM +0200, Marco Felsch wrote:
> This ports U-Boot commit:
> 
> | commit 2f3c92060dcd6bc9cfd3e2e344a3e1745ca39f09
> | Author: Peng Fan <peng.fan@nxp.com>
> | Date:   Thu Jul 9 13:39:26 2020 +0800
> |
> |     imx8m: workaround ROM serror
> |
> |     ROM SError happens on two cases:
> |
> |     1. ERR050342, on iMX8MQ HDCP enabled parts ROM writes to GPV1 register, but
> |     when ROM patch lock is fused, this write will cause SError.
> |
> |     2. ERR050350, on iMX8MQ/MM/MN, when the field return fuse is burned, HAB
> |     is field return mode, but the last 4K of ROM is still protected and cause
> |     SError.
> |
> |     Since ROM mask SError until ATF unmask it, so then ATF always meets the
> |     exception. This patch works around the issue in SPL by enabling SPL
> |     Exception vectors table and the SError exception, take the exception
> |     to eret immediately to clear the SError.
> |
> |     Signed-off-by: Ye Li <ye.li@nxp.com>
> |     Signed-off-by: Peng Fan <peng.fan@nxp.com>
> 
> Other than U-Boot we don't support exceptions in PBL and therefore we
> can handle it simpler by installing an dummy exception table to handle
> the pending exception. Later on the TF-A overrides the dummy table.
> 
> Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
> ---
> v2:
> - Adapt the Makefile
> - Drop the ifdef guard from the errata.h
> - Make use of runtime_address() to apply the erratum always during soc
>   lowlevel init.
> 
>  arch/arm/mach-imx/Makefile                 |  2 ++
>  arch/arm/mach-imx/cpu_init.c               | 12 ++++++-
>  arch/arm/mach-imx/errata.c                 | 24 +++++++++++++
>  arch/arm/mach-imx/imx8m_early_exceptions.S | 42 ++++++++++++++++++++++
>  include/mach/imx/errata.h                  |  8 +++++
>  5 files changed, 87 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/mach-imx/errata.c
>  create mode 100644 arch/arm/mach-imx/imx8m_early_exceptions.S
>  create mode 100644 include/mach/imx/errata.h
> 
> diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
> index cfd066c69de9..22ea48a83330 100644
> --- a/arch/arm/mach-imx/Makefile
> +++ b/arch/arm/mach-imx/Makefile
> @@ -34,6 +34,8 @@ obj-$(CONFIG_BAREBOX_UPDATE_IMX_EXTERNAL_NAND) += imx-bbu-external-nand.o
>  pbl-$(CONFIG_USB_GADGET_DRIVER_ARC_PBL) += imx-udc.o
>  obj-$(CONFIG_RESET_IMX_SRC) += src.o
>  lwl-y += cpu_init.o
> +lwl-y += errata.o
> +lwl-$(CONFIG_ARCH_IMX8M) += imx8m_early_exceptions.o
>  pbl-y += xload-spi.o xload-common.o xload-imx-nand.o xload-gpmi-nand.o
>  pbl-y += xload-qspi.o
>  obj-pbl-$(CONFIG_ARCH_IMX9) += ele.o
> diff --git a/arch/arm/mach-imx/cpu_init.c b/arch/arm/mach-imx/cpu_init.c
> index c5a47d9b9154..aebbd3defaec 100644
> --- a/arch/arm/mach-imx/cpu_init.c
> +++ b/arch/arm/mach-imx/cpu_init.c
> @@ -6,6 +6,7 @@
>  #include <asm/errata.h>
>  #include <linux/types.h>
>  #include <linux/bitops.h>
> +#include <mach/imx/errata.h>
>  #include <mach/imx/generic.h>
>  #include <mach/imx/imx7-regs.h>
>  #include <mach/imx/imx8mq-regs.h>
> @@ -75,17 +76,26 @@ void imx8mm_cpu_lowlevel_init(void)
>  	imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_SCTR);
>  
>  	imx8m_cpu_lowlevel_init();
> +
> +	erratum_050350_imx8m();
>  }
>  
>  void imx8mn_cpu_lowlevel_init(void)
>  	__alias(imx8mm_cpu_lowlevel_init);
>  
>  void imx8mp_cpu_lowlevel_init(void)
> -	__alias(imx8mm_cpu_lowlevel_init);
> +{
> +	/* ungate system counter */
> +	imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_SCTR);
> +
> +	imx8m_cpu_lowlevel_init();
> +}
>  
>  void imx8mq_cpu_lowlevel_init(void)
>  {
>  	imx8m_cpu_lowlevel_init();
> +
> +	erratum_050350_imx8m();
>  }
>  
>  #define CCM_AUTHEN_TZ_NS	BIT(9)
> diff --git a/arch/arm/mach-imx/errata.c b/arch/arm/mach-imx/errata.c
> new file mode 100644
> index 000000000000..afab08667879
> --- /dev/null
> +++ b/arch/arm/mach-imx/errata.c
> @@ -0,0 +1,24 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +
> +#include <asm/barebox-arm.h>
> +#include <asm/system.h>
> +#include <mach/imx/errata.h>
> +
> +#ifdef CONFIG_CPU_V8
> +
> +extern char early_imx8m_vectors[];
> +
> +void erratum_050350_imx8m(void)
> +{
> +	void *addr;
> +
> +	if (current_el() != 3)
> +		return;
> +
> +	addr = runtime_address(early_imx8m_vectors);
> +
> +	asm volatile("msr vbar_el3, %0" : : "r" (addr) : "cc");
> +	asm volatile("msr daifclr, #4;isb");
> +}
> +
> +#endif /* CONFIG_CPU_V8 */
> diff --git a/arch/arm/mach-imx/imx8m_early_exceptions.S b/arch/arm/mach-imx/imx8m_early_exceptions.S
> new file mode 100644
> index 000000000000..cd91e1a07b9c
> --- /dev/null
> +++ b/arch/arm/mach-imx/imx8m_early_exceptions.S
> @@ -0,0 +1,42 @@
> +/*
> + * (C) Copyright 2013
> + * David Feng <fenghua@phytium.com.cn>
> + *
> + * SPDX-License-Identifier:	GPL-2.0+
> + */
> +
> +#include <linux/linkage.h>
> +
> +#ifdef CONFIG_CPU_V8

This file is compiled only when CONFIG_ARCH_IMX8M is enabled. This
options selects CONFIG_CPU_V8 which makes this #ifdef unnecessary.

Dropped while applying.

Sascha

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  reply	other threads:[~2024-06-17  6:50 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-13 13:06 [PATCH v2 1/2] ARM: aarch64: align scr_el3 register setup with U-Boot Marco Felsch
2024-06-13 13:06 ` [PATCH v2 2/2] ARM: i.MX8M: add support to handle ROM SError ERR050350 Marco Felsch
2024-06-17  6:49   ` Sascha Hauer [this message]
2024-06-25  8:19     ` Marco Felsch
2024-06-17  6:48 ` [PATCH v2 1/2] ARM: aarch64: align scr_el3 register setup with U-Boot Sascha Hauer

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