[PATCH 1/2] usb: dwc2: core: add no-csftrst-wait DT property

chalianis1
2026-03-31T03:18:24Z

From: Chali Anis <chalianis1@gmail.com>

Some platforms (e.g. RPi4/bcm2711) do not deassert GRSTCTL_CSFTRST within
the expected window but continue to operate correctly, causing probe to
fail with ETIMEDOUT.

Per the datasheet, GRSTCTL_CSFTRST is self-clearing but requires at least
3 PHY clocks after reset before any PHY domain access. Add a 1us delay to
satisfy this requirement.

Additionally introduce the 'no-csftrst-wait' devicetree property to skip
polling for the bit to clear on platforms where the reset completes but the
status bit is unreliable.

Signed-off-by: Chali Anis <chalianis1@gmail.com>
---
drivers/usb/dwc2/core.c | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c
index 60cc690fdbc0..9a2356ee074e 100644
--- a/drivers/usb/dwc2/core.c
+++ b/drivers/usb/dwc2/core.c
@@ -770,6 +770,7 @@ bool dwc2_iddig_filter_enabled(struct dwc2 *dwc2)
*/
int dwc2_core_reset(struct dwc2 *dwc2)
{
+ struct device_node *np = dwc2->dev->of_node;
bool wait_for_host_mode = false;
uint32_t greset;
int ret;
@@ -809,11 +810,16 @@ int dwc2_core_reset(struct dwc2 *dwc2)
greset |= GRSTCTL_CSFTRST;
dwc2_writel(dwc2, greset, GRSTCTL);

- ret = dwc2_wait_bit_clear(dwc2, GRSTCTL, GRSTCTL_CSFTRST, 10000);
- if (ret) {
- dwc2_warn(dwc2, "%s: Timeout! Waiting for Core Soft Reset\n",
+ /* Wait for at least 3 PHY Clocks */
+ udelay(1);
+
+ if (!of_property_read_bool(np, "no-csftrst-wait")) {
+ ret = dwc2_wait_bit_clear(dwc2, GRSTCTL, GRSTCTL_CSFTRST, 10000);
+ if (ret) {
+ dwc2_warn(dwc2, "%s: Timeout! Waiting for Core Soft Reset\n",
__func__);
- return ret;
+ return ret;
+ }
}

if (wait_for_host_mode)