From: Ivo Clarysse <ivo.clarysse@gmail.com>
To: Matthias Kaehlcke <matthias@kaehlcke.net>
Cc: barebox@lists.infradead.org
Subject: Re: Barebox working on freescale-mx25-3-stack?
Date: Wed, 24 Mar 2010 16:23:33 +0100 [thread overview]
Message-ID: <ba216b431003240823l6b729cbfi6f4fa8e50173a933@mail.gmail.com> (raw)
In-Reply-To: <20100324150818.GB2328@darwin>
On Wed, Mar 24, 2010 at 4:08 PM, Matthias Kaehlcke
<matthias@kaehlcke.net> wrote:
>
> after applying your patch barebox effectivly came up :)
>
> thanks a lot!
>
> could you explain in few words why the patch is needed?
RAM initialization is implemented in two places: lowlevel_init.S and
the "Device Configuration Data" (DCD) block.
When booting from an SD card, the i.MX25 reads out the DCD block and
applies the settings found there.
The RAM initialization in lowlevel_init.S is skipped when booting from
SD; by the time board_init_lowlevel gets executed,
that routine is already running from RAM, and will skip initializing memory.
The DCD table in barebox git contains entries for mDDR memory. This
does not work with DDR2 memory.
Probably barebox needs a compile-time option to switch between 128 MiB
mDDR memory installed on older MCIMX25PDK CPU engine boards and the 64
MiB DDR2 memory found on newer boards.
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next prev parent reply other threads:[~2010-03-24 15:23 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-03-23 13:32 Matthias Kaehlcke
2010-03-23 13:38 ` Eric Bénard
2010-03-23 14:26 ` Sascha Hauer
2010-03-23 15:09 ` Matthias Kaehlcke
2010-03-23 15:31 ` Eric Bénard
2010-03-23 16:22 ` Matthias Kaehlcke
2010-03-23 16:32 ` Eric Bénard
2010-03-24 14:54 ` Ivo Clarysse
2010-03-24 15:08 ` Matthias Kaehlcke
2010-03-24 15:23 ` Ivo Clarysse [this message]
2010-03-24 15:30 ` Matthias Kaehlcke
2010-03-23 15:31 ` Sascha Hauer
2010-03-23 16:13 ` Matthias Kaehlcke
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