Re: Beaglebone Black defconfigs

[Ahmad Fatoum <a.fatoum@pengutronix.de>]

Hi,

On 11.06.21 12:05, Konstantin Kletschke wrote:
> Hello,
> 
> I am currently trying to bring up barebox for my Beaglebone Black devices.
> 
> I did an "ARCH=arm CROSS_COMPILE=arm-buildroot-linux-gnueabihf- make am335x_mlo_defconfig”, make and
> copied resulting barebox-am33xx-beaglebone-mlo.img to MLO into my FAT boot partition.
> 
> Then I did "ARCH=arm CROSS_COMPILE=arm-buildroot-linux-gnueabihf- make omap3530_beagle_defconfig”, make 
> and copied resulting barebox-beagleboard.img to barebox.bin into my boot FAT.

The docs (https://www.barebox.org/doc/latest/boards/am335x.html) say the second stage
defconfig is omap_defconfig.
 
> Is the the different prefix in the defconfigs (am33… vs. omap35…) reasonable?

Second stage is much less size limited, because it runs from external SDRAM. This allows
having a config that builds images for multiple different boards and SoCs.

First stage runs from small SRAM, so images usually contain only code for a single
SoC. I haven't checked, but this may explain the different naming.

> Is this approach generally reasonable?
> 
> Many references in internet to matching
> defconfigs I found refer to non existing ones, there seems to happen great overhaul meanwhile.

I haven't been using barebox long enough, but I assume you found references
to old non-multi-image enabled OMAP support. Modern barebox platforms build
multiple images for different boards in one go and thus there are less
defconfigs.

> I am also asking because, well, it does not work:
> 
> barebox 2021.05.0-00093-g7689055a8 #2 Fri Jun 11 09:01:36 CEST 2021
> 
> 
> Board: TI AM335x BeagleBone
> detected 'BeagleBone Black'
> omap-hsmmc 48060000.mmc@0.of: registered as mmc0
> omap-hsmmc 481d8000.mmc@0.of: registered as mmc1
> booting from MMC
> mmc1: detected MMC card version 5.1
> mmc1: registered mmc1
> unable to handle paging request at address 0x4020f010
> pc : [<8ffbbd5a>]    lr : [<8ffbbd89>]
> sp : 9ffeffb0  ip : 00000000  fp : 00014e2c
> r10: 00125920  r9 : 8ffbbce5  r8 : 9ffe4000
> r7 : 80000000  r6 : 9fe1a46e  r5 : 402f0400  r4 : 8ffbbcdc
> r3 : 0000060a  r2 : 4020f010  r1 : abe742c3  r0 : 80000000
> Flags: nzCv  IRQs off  FIQs on  Mode SVC_32
> 
> no stack data available
> 
> This repeats endlessly. I investigated the data sheet and if I am correct 0x4020f010 seems to be a reserved> area in L3 memory map.

Compiling barebox for one SoC and running it on another can lead
to funny effects.

Cheers,
Ahmad

> 
> Kind Regards
> Konsti
> 
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