From mboxrd@z Thu Jan 1 00:00:00 1970 Delivery-date: Tue, 16 Dec 2025 15:59:29 +0100 Received: from metis.whiteo.stw.pengutronix.de ([2a0a:edc0:2:b01:1d::104]) by lore.white.stw.pengutronix.de with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1vVWWP-00C8wo-0Y for lore@lore.pengutronix.de; Tue, 16 Dec 2025 15:59:29 +0100 Received: from localhost ([127.0.0.1] helo=metis.whiteo.stw.pengutronix.de) by metis.whiteo.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1vVWWO-0000ho-HQ; Tue, 16 Dec 2025 15:59:28 +0100 Received: from dude05.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::54]) by metis.whiteo.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1vVWWH-0000ha-Mi; Tue, 16 Dec 2025 15:59:21 +0100 From: Fabian Pfitzner To: distrokit@pengutronix.de Date: Tue, 16 Dec 2025 15:58:14 +0100 Message-ID: <20251216145813.1598614-2-f.pfitzner@pengutronix.de> X-Mailer: git-send-email 2.47.3 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [DistroKit] [PATCH] v8a: kernel: enable clock driver for Renesas 9-series X-BeenThere: distrokit@pengutronix.de X-Mailman-Version: 2.1.29 Precedence: list List-Id: DistroKit Mailinglist List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fabian Pfitzner Sender: "DistroKit" X-SA-Exim-Connect-IP: 127.0.0.1 X-SA-Exim-Mail-From: distrokit-bounces@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false The TQ MBa8MPxL board integrates a Renesas 9-series PCIe clock. The integrated PCIe phy depends on this clock, wich will fail probing on boot. Enable the corresponding kernel driver to fix this problem. Signed-off-by: Fabian Pfitzner --- configs/platform-v8a/kernelconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/platform-v8a/kernelconfig b/configs/platform-v8a/kernelconfig index 835ae5e..6ab0cd2 100644 --- a/configs/platform-v8a/kernelconfig +++ b/configs/platform-v8a/kernelconfig @@ -4092,7 +4092,7 @@ CONFIG_COMMON_CLK_SCPI=y # CONFIG_COMMON_CLK_AXI_CLKGEN is not set # CONFIG_COMMON_CLK_XGENE is not set # CONFIG_COMMON_CLK_PWM is not set -# CONFIG_COMMON_CLK_RS9_PCIE is not set +CONFIG_COMMON_CLK_RS9_PCIE=y # CONFIG_COMMON_CLK_SI521XX is not set # CONFIG_COMMON_CLK_VC3 is not set # CONFIG_COMMON_CLK_VC5 is not set -- 2.47.3