Re: [PATCH] dts: zcu104: remove unnecessary ZynqMP clock dtsi

[Sascha Hauer <sha@pengutronix.de>]

On Thu, Mar 18, 2021 at 10:22:06AM +0100, Michael Tretter wrote:
> The clock definitions are now available from the Linux device tree as
> dts/src/arm64/xilinx/zynqmp-clk-ccf.dtsi and the clock-controller is
> defined in dts/src/arm64/xilinx/zynqmp.dtsi. Defining the clocks in a
> Barebox-specific file is not necessary anymore.
> 
> Remove zynqmp-clk.dtsi and the include from the board device tree.
> 
> The files are already correctly included by the imported board device
> trees (dts/src/arm64/xilinx/zynqmp-zcu104-revA.dts).
> 
> Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
> ---

Applied, thanks

Sascha

>  arch/arm/dts/zynqmp-clk.dtsi        | 155 ----------------------------
>  arch/arm/dts/zynqmp-zcu104-revA.dts |   1 -
>  2 files changed, 156 deletions(-)
>  delete mode 100644 arch/arm/dts/zynqmp-clk.dtsi
> 
> diff --git a/arch/arm/dts/zynqmp-clk.dtsi b/arch/arm/dts/zynqmp-clk.dtsi
> deleted file mode 100644
> index 68ece9aa6732..000000000000
> --- a/arch/arm/dts/zynqmp-clk.dtsi
> +++ /dev/null
> @@ -1,155 +0,0 @@
> -// SPDX-License-Identifier: GPL-2.0+
> -/*
> - * Clock specification for Xilinx ZynqMP
> - *
> - * (C) Copyright 2017, Xilinx, Inc.
> - *
> - * Michal Simek <michal.simek@xilinx.com>
> - */
> -
> -#include <dt-bindings/clock/xlnx-zynqmp-clk.h>
> -
> -&zynqmp_firmware {
> -       zynqmp_clk: clock-controller {
> -               #clock-cells = <1>;
> -               compatible = "xlnx,zynqmp-clk";
> -               clocks = <&pss_ref_clk>, <&video_clk>, <&pss_alt_ref_clk>, <&aux_ref_clk>, <&gt_crx_ref_clk>;
> -               clock-names = "pss_ref_clk", "video_clk", "pss_alt_ref_clk", "aux_ref_clk", "gt_crx_ref_clk";
> -       };
> -};
> -
> -/ {
> -	pss_ref_clk: pss_ref_clk {
> -		compatible = "fixed-clock";
> -		#clock-cells = <0>;
> -		clock-frequency = <33333333>;
> -	};
> -
> -	video_clk: video_clk {
> -		compatible = "fixed-clock";
> -		#clock-cells = <0>;
> -		clock-frequency = <27000000>;
> -	};
> -
> -	pss_alt_ref_clk: pss_alt_ref_clk {
> -		compatible = "fixed-clock";
> -		#clock-cells = <0>;
> -		clock-frequency = <0>;
> -	};
> -
> -	gt_crx_ref_clk: gt_crx_ref_clk {
> -		compatible = "fixed-clock";
> -		#clock-cells = <0>;
> -		clock-frequency = <108000000>;
> -	};
> -
> -	aux_ref_clk: aux_ref_clk {
> -		compatible = "fixed-clock";
> -		#clock-cells = <0>;
> -		clock-frequency = <27000000>;
> -	};
> -};
> -
> -&can0 {
> -	clocks = <&zynqmp_clk CAN0_REF>, <&zynqmp_clk LPD_LSBUS>;
> -};
> -
> -&can1 {
> -	clocks = <&zynqmp_clk CAN1_REF>, <&zynqmp_clk LPD_LSBUS>;
> -};
> -
> -&cpu0 {
> -	clocks = <&zynqmp_clk ACPU>;
> -};
> -
> -&gem0 {
> -	clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM0_TX>, <&zynqmp_clk GEM0_REF>, <&zynqmp_clk GEM_TSU>;
> -	clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
> -};
> -
> -&gem1 {
> -	clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM1_TX>, <&zynqmp_clk GEM1_REF>, <&zynqmp_clk GEM_TSU>;
> -	clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
> -};
> -
> -&gem2 {
> -	clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM2_TX>, <&zynqmp_clk GEM2_REF>, <&zynqmp_clk GEM_TSU>;
> -	clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
> -};
> -
> -&gem3 {
> -	clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM3_TX>, <&zynqmp_clk GEM3_REF>, <&zynqmp_clk GEM_TSU>;
> -	clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
> -};
> -
> -&gpio {
> -	clocks = <&zynqmp_clk LPD_LSBUS>;
> -};
> -
> -&i2c0 {
> -	clocks = <&zynqmp_clk I2C0_REF>;
> -};
> -
> -&i2c1 {
> -	clocks = <&zynqmp_clk I2C1_REF>;
> -};
> -
> -&pcie {
> -	clocks = <&zynqmp_clk PCIE_REF>;
> -};
> -
> -&sata {
> -	clocks = <&zynqmp_clk SATA_REF>;
> -};
> -
> -&sdhci0 {
> -	clocks = <&zynqmp_clk SDIO0_REF>, <&zynqmp_clk LPD_LSBUS>;
> -};
> -
> -&sdhci1 {
> -	clocks = <&zynqmp_clk SDIO1_REF>, <&zynqmp_clk LPD_LSBUS>;
> -};
> -
> -&spi0 {
> -	clocks = <&zynqmp_clk SPI0_REF>, <&zynqmp_clk LPD_LSBUS>;
> -};
> -
> -&spi1 {
> -	clocks = <&zynqmp_clk SPI0_REF>, <&zynqmp_clk LPD_LSBUS>;
> -};
> -
> -&ttc0 {
> -	clocks = <&zynqmp_clk LPD_LSBUS>;
> -};
> -
> -&ttc1 {
> -	clocks = <&zynqmp_clk LPD_LSBUS>;
> -};
> -
> -&ttc2 {
> -	clocks = <&zynqmp_clk LPD_LSBUS>;
> -};
> -
> -&ttc3 {
> -	clocks = <&zynqmp_clk LPD_LSBUS>;
> -};
> -
> -&uart0 {
> -	clocks = <&zynqmp_clk UART0_REF>, <&zynqmp_clk LPD_LSBUS>;
> -};
> -
> -&uart1 {
> -	clocks = <&zynqmp_clk UART1_REF>, <&zynqmp_clk LPD_LSBUS>;
> -};
> -
> -&usb0 {
> -	clocks = <&zynqmp_clk USB0_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>;
> -};
> -
> -&usb1 {
> -	clocks = <&zynqmp_clk USB1_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>;
> -};
> -
> -&watchdog0 {
> -	clocks = <&zynqmp_clk WDT>;
> -};
> diff --git a/arch/arm/dts/zynqmp-zcu104-revA.dts b/arch/arm/dts/zynqmp-zcu104-revA.dts
> index 8b8dd84c1dc3..8c467ee97045 100644
> --- a/arch/arm/dts/zynqmp-zcu104-revA.dts
> +++ b/arch/arm/dts/zynqmp-zcu104-revA.dts
> @@ -8,4 +8,3 @@
>   */
>  
>  #include <arm64/xilinx/zynqmp-zcu104-revA.dts>
> -#include "zynqmp-clk.dtsi"
> -- 
> 2.29.2
> 
> 
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