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From: Ahmad Fatoum <>
Cc: Ahmad Fatoum <>
Subject: [PATCH v2 3/5] clocksource: RISC-V: demote probe success messages to debug level
Date: Mon, 31 May 2021 09:03:23 +0200	[thread overview]
Message-ID: <> (raw)
In-Reply-To: <>

There's always some clocksource driver loaded, so reporting it probed
successfully doesn't add much value. timebase-frequency can be read
from the device tree if needed and which driver were probed successfully
can be seen in drvinfo output, so demote both riscv and clint timer
messages to debug level.

Signed-off-by: Ahmad Fatoum <>
v1 -> v2:
  - new patch
 drivers/clocksource/timer-clint.c | 2 +-
 drivers/clocksource/timer-riscv.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clocksource/timer-clint.c b/drivers/clocksource/timer-clint.c
index b7360010bdb6..4eeb9cf7ffc9 100644
--- a/drivers/clocksource/timer-clint.c
+++ b/drivers/clocksource/timer-clint.c
@@ -72,7 +72,7 @@ static int clint_timer_init_dt(struct device_d* dev)
 		return PTR_ERR(iores);
 	clint_timer_val = IOMEM(iores->start) + CLINT_TIMER_VAL_OFF;
-	dev_info(dev, "running at %lu Hz\n", riscv_timebase);
+	dev_dbg(dev, "running at %lu Hz\n", riscv_timebase);
 	clint_clocksource.mult = clocksource_hz2mult(riscv_timebase, clint_clocksource.shift);
diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
index cbbe18d9a693..5a517fe6b43d 100644
--- a/drivers/clocksource/timer-riscv.c
+++ b/drivers/clocksource/timer-riscv.c
@@ -60,7 +60,7 @@ static struct clocksource riscv_clocksource = {
 static int riscv_timer_init(struct device_d* dev)
-	dev_info(dev, "running at %lu Hz\n", riscv_timebase);
+	dev_dbg(dev, "running at %lu Hz\n", riscv_timebase);
 	riscv_clocksource.mult = clocksource_hz2mult(riscv_timebase, riscv_clocksource.shift);

barebox mailing list

  parent reply	other threads:[~2021-05-31  7:04 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-31  7:03 [PATCH v2 1/5] RISC-V: extend multi-image to support both S- and M-Mode Ahmad Fatoum
2021-05-31  7:03 ` [PATCH v2 2/5] RISC-V: cpuinfo: return some output for non-SBI systems as well Ahmad Fatoum
2021-05-31  7:03 ` Ahmad Fatoum [this message]
2021-05-31  7:03 ` [PATCH v2 4/5] RISC-V: S-Mode: propagate Hart ID Ahmad Fatoum
2021-05-31  7:05   ` Ahmad Fatoum
2021-05-31  7:03 ` [PATCH v2 5/5] RISC-V: erizo: make it easier to reuse ns16550 debug_ll Ahmad Fatoum
2021-06-07  7:42 ` [PATCH v2 1/5] RISC-V: extend multi-image to support both S- and M-Mode Ahmad Fatoum

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