* [PATCH v2] mci: sdhci: fix big-endian write for blockcount/size
@ 2021-08-31 6:47 Steffen Trumtrar
2021-10-04 11:05 ` Sascha Hauer
0 siblings, 1 reply; 2+ messages in thread
From: Steffen Trumtrar @ 2021-08-31 6:47 UTC (permalink / raw)
To: Barebox List
From: Steffen Trumtrar <str@pengutronix.de>
The patch
0a47bce1b03fd236384e904dca005c0870ce8684
mci: imx-esdhc: Use common DMA helpers
converted the imx-esdhc driver to use the DMA helpers introduced with
60b608b2714472aa22862a20d04f267cbbac0863
mci: sdhci: Add DMA transfer helpers
The common DMA helpers however break support for BE-variants (e.g.
Layerscape) as the BLKATTR register seems to be a 32-bit register which
internally switches bytes when used with two 16-bit write accesses.
As the alignment should also work for LE-SDHCI-variants convert the two
16-bit accesses to one 32-bit access.
Signed-off-by: Steffen Trumtrar <str@pengutronix.de>
---
drivers/mci/sdhci.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/mci/sdhci.c b/drivers/mci/sdhci.c
index aca4a5a6f911..8b5520d6827a 100644
--- a/drivers/mci/sdhci.c
+++ b/drivers/mci/sdhci.c
@@ -129,9 +129,8 @@ void sdhci_setup_data_pio(struct sdhci *sdhci, struct mci_data *data)
if (!data)
return;
- sdhci_write16(sdhci, SDHCI_BLOCK_SIZE, sdhci->sdma_boundary |
- SDHCI_TRANSFER_BLOCK_SIZE(data->blocksize));
- sdhci_write16(sdhci, SDHCI_BLOCK_COUNT, data->blocks);
+ sdhci_write32(sdhci, SDHCI_BLOCK_SIZE, sdhci->sdma_boundary |
+ SDHCI_TRANSFER_BLOCK_SIZE(data->blocksize) | data->blocks << 16);
}
void sdhci_setup_data_dma(struct sdhci *sdhci, struct mci_data *data,
--
2.30.2
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^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH v2] mci: sdhci: fix big-endian write for blockcount/size
2021-08-31 6:47 [PATCH v2] mci: sdhci: fix big-endian write for blockcount/size Steffen Trumtrar
@ 2021-10-04 11:05 ` Sascha Hauer
0 siblings, 0 replies; 2+ messages in thread
From: Sascha Hauer @ 2021-10-04 11:05 UTC (permalink / raw)
To: Steffen Trumtrar; +Cc: Barebox List
On Tue, Aug 31, 2021 at 08:47:15AM +0200, Steffen Trumtrar wrote:
> From: Steffen Trumtrar <str@pengutronix.de>
>
> The patch
>
> 0a47bce1b03fd236384e904dca005c0870ce8684
> mci: imx-esdhc: Use common DMA helpers
>
> converted the imx-esdhc driver to use the DMA helpers introduced with
>
> 60b608b2714472aa22862a20d04f267cbbac0863
> mci: sdhci: Add DMA transfer helpers
>
> The common DMA helpers however break support for BE-variants (e.g.
> Layerscape) as the BLKATTR register seems to be a 32-bit register which
> internally switches bytes when used with two 16-bit write accesses.
> As the alignment should also work for LE-SDHCI-variants convert the two
> 16-bit accesses to one 32-bit access.
>
> Signed-off-by: Steffen Trumtrar <str@pengutronix.de>
> ---
> drivers/mci/sdhci.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
Applied, thanks
Sascha
>
> diff --git a/drivers/mci/sdhci.c b/drivers/mci/sdhci.c
> index aca4a5a6f911..8b5520d6827a 100644
> --- a/drivers/mci/sdhci.c
> +++ b/drivers/mci/sdhci.c
> @@ -129,9 +129,8 @@ void sdhci_setup_data_pio(struct sdhci *sdhci, struct mci_data *data)
> if (!data)
> return;
>
> - sdhci_write16(sdhci, SDHCI_BLOCK_SIZE, sdhci->sdma_boundary |
> - SDHCI_TRANSFER_BLOCK_SIZE(data->blocksize));
> - sdhci_write16(sdhci, SDHCI_BLOCK_COUNT, data->blocks);
> + sdhci_write32(sdhci, SDHCI_BLOCK_SIZE, sdhci->sdma_boundary |
> + SDHCI_TRANSFER_BLOCK_SIZE(data->blocksize) | data->blocks << 16);
> }
>
> void sdhci_setup_data_dma(struct sdhci *sdhci, struct mci_data *data,
> --
> 2.30.2
>
>
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
>
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