* [PATCH 1/4] nvmem: snvs_lpgpr: remove unnecessary cfg->name assignment
2026-06-03 13:33 [PATCH 0/4] ARM: i.MX6UL: initialize snvs peripheral Stefan Kerkmann
@ 2026-06-03 13:33 ` Stefan Kerkmann
2026-06-03 14:41 ` Ahmad Fatoum
2026-06-03 13:33 ` [PATCH 2/4] ARM: i.MX8M/i.MX7: initialize SNVS glitch detection for all families Stefan Kerkmann
` (3 subsequent siblings)
4 siblings, 1 reply; 7+ messages in thread
From: Stefan Kerkmann @ 2026-06-03 13:33 UTC (permalink / raw)
To: Sascha Hauer, open list:BAREBOX; +Cc: Stefan Kerkmann
The name is now fixed to `snvs` since commit:
8f52947260 ("nvmem: snvs_lpgpr: set nvmem config name to snvs").
Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de>
---
drivers/nvmem/snvs_lpgpr.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/nvmem/snvs_lpgpr.c b/drivers/nvmem/snvs_lpgpr.c
index 95ce023a14..6c1d5a836f 100644
--- a/drivers/nvmem/snvs_lpgpr.c
+++ b/drivers/nvmem/snvs_lpgpr.c
@@ -117,7 +117,6 @@ static int snvs_lpgpr_probe(struct device *dev)
return PTR_ERR(priv->regmap);
cfg = &priv->cfg;
- cfg->name = dev_name(dev);
cfg->dev = dev;
cfg->priv = priv;
cfg->stride = 4;
--
2.47.3
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH 1/4] nvmem: snvs_lpgpr: remove unnecessary cfg->name assignment
2026-06-03 13:33 ` [PATCH 1/4] nvmem: snvs_lpgpr: remove unnecessary cfg->name assignment Stefan Kerkmann
@ 2026-06-03 14:41 ` Ahmad Fatoum
0 siblings, 0 replies; 7+ messages in thread
From: Ahmad Fatoum @ 2026-06-03 14:41 UTC (permalink / raw)
To: Stefan Kerkmann, Sascha Hauer, open list:BAREBOX
On 6/3/26 3:33 PM, Stefan Kerkmann wrote:
> The name is now fixed to `snvs` since commit:
>
> 8f52947260 ("nvmem: snvs_lpgpr: set nvmem config name to snvs").
>
> Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
> ---
> drivers/nvmem/snvs_lpgpr.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/drivers/nvmem/snvs_lpgpr.c b/drivers/nvmem/snvs_lpgpr.c
> index 95ce023a14..6c1d5a836f 100644
> --- a/drivers/nvmem/snvs_lpgpr.c
> +++ b/drivers/nvmem/snvs_lpgpr.c
> @@ -117,7 +117,6 @@ static int snvs_lpgpr_probe(struct device *dev)
> return PTR_ERR(priv->regmap);
>
> cfg = &priv->cfg;
> - cfg->name = dev_name(dev);
> cfg->dev = dev;
> cfg->priv = priv;
> cfg->stride = 4;
>
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
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^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 2/4] ARM: i.MX8M/i.MX7: initialize SNVS glitch detection for all families
2026-06-03 13:33 [PATCH 0/4] ARM: i.MX6UL: initialize snvs peripheral Stefan Kerkmann
2026-06-03 13:33 ` [PATCH 1/4] nvmem: snvs_lpgpr: remove unnecessary cfg->name assignment Stefan Kerkmann
@ 2026-06-03 13:33 ` Stefan Kerkmann
2026-06-03 13:33 ` [PATCH 3/4] ARM: i.MX7: snvs: rename imx7_snvs_init -> imx7_setup_snvs Stefan Kerkmann
` (2 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Stefan Kerkmann @ 2026-06-03 13:33 UTC (permalink / raw)
To: Sascha Hauer, open list:BAREBOX; +Cc: Stefan Kerkmann
The value and register is identical across i.MX8M and i.MX7 so move the
block to the shared snvs_init() function.
Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de>
---
arch/arm/mach-imx/snvs.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-imx/snvs.c b/arch/arm/mach-imx/snvs.c
index 80df62ad96..414e927b05 100644
--- a/arch/arm/mach-imx/snvs.c
+++ b/arch/arm/mach-imx/snvs.c
@@ -22,6 +22,11 @@ static void snvs_init(void __iomem *snvs)
val = readl(snvs + SNVS_HPCOMR);
val |= SNVS_HPCOMR_NPSWA_EN;
writel(val, snvs + SNVS_HPCOMR);
+
+ /* Initialize glitch detect */
+ writel(SNVS_LPPGDR_INIT, snvs + SNVS_LPLVDR);
+ /* Clear interrupt status */
+ writel(0xffffffff, snvs + SNVS_LPSR);
}
void imx7_snvs_init(void)
@@ -35,10 +40,5 @@ void imx8m_setup_snvs(void)
{
void __iomem *snvs = IOMEM(MX8M_SNVS_BASE_ADDR);
- /* Initialize glitch detect */
- writel(SNVS_LPPGDR_INIT, snvs + SNVS_LPLVDR);
- /* Clear interrupt status */
- writel(0xffffffff, snvs + SNVS_LPSR);
-
- snvs_init(snvs);
+ snvs_init(snvs);
}
--
2.47.3
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH 3/4] ARM: i.MX7: snvs: rename imx7_snvs_init -> imx7_setup_snvs
2026-06-03 13:33 [PATCH 0/4] ARM: i.MX6UL: initialize snvs peripheral Stefan Kerkmann
2026-06-03 13:33 ` [PATCH 1/4] nvmem: snvs_lpgpr: remove unnecessary cfg->name assignment Stefan Kerkmann
2026-06-03 13:33 ` [PATCH 2/4] ARM: i.MX8M/i.MX7: initialize SNVS glitch detection for all families Stefan Kerkmann
@ 2026-06-03 13:33 ` Stefan Kerkmann
2026-06-03 13:33 ` [PATCH 4/4] ARM: i.MX6UL: initialize SNVS Stefan Kerkmann
2026-06-04 7:02 ` [PATCH 0/4] ARM: i.MX6UL: initialize snvs peripheral Sascha Hauer
4 siblings, 0 replies; 7+ messages in thread
From: Stefan Kerkmann @ 2026-06-03 13:33 UTC (permalink / raw)
To: Sascha Hauer, open list:BAREBOX; +Cc: Stefan Kerkmann
For consistency with the i.MX8 family.
Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de>
---
arch/arm/mach-imx/snvs.c | 2 +-
include/mach/imx/snvs.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-imx/snvs.c b/arch/arm/mach-imx/snvs.c
index 414e927b05..8ec8accf6a 100644
--- a/arch/arm/mach-imx/snvs.c
+++ b/arch/arm/mach-imx/snvs.c
@@ -29,7 +29,7 @@ static void snvs_init(void __iomem *snvs)
writel(0xffffffff, snvs + SNVS_LPSR);
}
-void imx7_snvs_init(void)
+void imx7_setup_snvs(void)
{
void __iomem *snvs = IOMEM(MX7_SNVS_BASE_ADDR);
diff --git a/include/mach/imx/snvs.h b/include/mach/imx/snvs.h
index 01154d57d9..65e1da34f0 100644
--- a/include/mach/imx/snvs.h
+++ b/include/mach/imx/snvs.h
@@ -3,7 +3,7 @@
#ifndef __MACH_IMX_SNVS_H
#define __MACH_IMX_SNVS_H
-void imx7_snvs_init(void);
+void imx7_setup_snvs(void);
void imx8m_setup_snvs(void);
#endif /* __MACH_IMX_SNVS_H */
--
2.47.3
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH 4/4] ARM: i.MX6UL: initialize SNVS
2026-06-03 13:33 [PATCH 0/4] ARM: i.MX6UL: initialize snvs peripheral Stefan Kerkmann
` (2 preceding siblings ...)
2026-06-03 13:33 ` [PATCH 3/4] ARM: i.MX7: snvs: rename imx7_snvs_init -> imx7_setup_snvs Stefan Kerkmann
@ 2026-06-03 13:33 ` Stefan Kerkmann
2026-06-04 7:02 ` [PATCH 0/4] ARM: i.MX6UL: initialize snvs peripheral Sascha Hauer
4 siblings, 0 replies; 7+ messages in thread
From: Stefan Kerkmann @ 2026-06-03 13:33 UTC (permalink / raw)
To: Sascha Hauer, open list:BAREBOX; +Cc: Stefan Kerkmann
The snvs lpgr register can only be written after initializing the snvs
peripheral. Which is identical across the i.MX8/7/6 families.
Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de>
---
arch/arm/mach-imx/Kconfig | 2 +-
arch/arm/mach-imx/cpu_init.c | 2 ++
arch/arm/mach-imx/snvs.c | 8 ++++++++
include/mach/imx/snvs.h | 1 +
4 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 7f78e5282f..9d198e5406 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -70,7 +70,7 @@ config ARCH_IMX_TZASC
config ARCH_IMX_SNVS
bool
- depends on ARCH_IMX7 || ARCH_IMX8M
+ depends on ARCH_IMX6 || ARCH_IMX7 || ARCH_IMX8M
default y
#
diff --git a/arch/arm/mach-imx/cpu_init.c b/arch/arm/mach-imx/cpu_init.c
index e0fa459fe7..4fd72a6f30 100644
--- a/arch/arm/mach-imx/cpu_init.c
+++ b/arch/arm/mach-imx/cpu_init.c
@@ -12,6 +12,7 @@
#include <mach/imx/imx8mq-regs.h>
#include <mach/imx/imx8m-ccm-regs.h>
#include <mach/imx/imx9-regs.h>
+#include <mach/imx/snvs.h>
#include <mach/imx/trdc.h>
#include <io.h>
#include <asm/cache.h>
@@ -52,6 +53,7 @@ void imx6ul_cpu_lowlevel_init(void)
{
cortex_a7_lowlevel_init();
arm_cpu_lowlevel_init();
+ imx6_setup_snvs();
}
void imx7_cpu_lowlevel_init(void)
diff --git a/arch/arm/mach-imx/snvs.c b/arch/arm/mach-imx/snvs.c
index 8ec8accf6a..eb049eaf6f 100644
--- a/arch/arm/mach-imx/snvs.c
+++ b/arch/arm/mach-imx/snvs.c
@@ -3,6 +3,7 @@
#include <io.h>
#include <linux/bits.h>
#include <mach/imx/snvs.h>
+#include <mach/imx/imx6-regs.h>
#include <mach/imx/imx7-regs.h>
#include <mach/imx/imx8m-regs.h>
@@ -36,6 +37,13 @@ void imx7_setup_snvs(void)
snvs_init(snvs);
}
+void imx6_setup_snvs(void)
+{
+ void __iomem *snvs = IOMEM(MX6_SNVS_BASE_ADDR);
+
+ snvs_init(snvs);
+}
+
void imx8m_setup_snvs(void)
{
void __iomem *snvs = IOMEM(MX8M_SNVS_BASE_ADDR);
diff --git a/include/mach/imx/snvs.h b/include/mach/imx/snvs.h
index 65e1da34f0..dde2602074 100644
--- a/include/mach/imx/snvs.h
+++ b/include/mach/imx/snvs.h
@@ -3,6 +3,7 @@
#ifndef __MACH_IMX_SNVS_H
#define __MACH_IMX_SNVS_H
+void imx6_setup_snvs(void);
void imx7_setup_snvs(void);
void imx8m_setup_snvs(void);
--
2.47.3
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH 0/4] ARM: i.MX6UL: initialize snvs peripheral
2026-06-03 13:33 [PATCH 0/4] ARM: i.MX6UL: initialize snvs peripheral Stefan Kerkmann
` (3 preceding siblings ...)
2026-06-03 13:33 ` [PATCH 4/4] ARM: i.MX6UL: initialize SNVS Stefan Kerkmann
@ 2026-06-04 7:02 ` Sascha Hauer
4 siblings, 0 replies; 7+ messages in thread
From: Sascha Hauer @ 2026-06-04 7:02 UTC (permalink / raw)
To: open list:BAREBOX, Stefan Kerkmann
On Wed, 03 Jun 2026 15:33:41 +0200, Stefan Kerkmann wrote:
> This series adds snvs peripheral initialization for the i.MX6UL soc
> which is necessary to write values into the snvs lpgpr register.
>
> To make the code more consistent across the i.MX6/7/8M families some
> smaller cleanups are included as well.
>
>
> [...]
Applied, thanks!
[1/4] nvmem: snvs_lpgpr: remove unnecessary cfg->name assignment
https://git.pengutronix.de/cgit/barebox/commit/?id=d37ceab82e82 (link may not be stable)
[2/4] ARM: i.MX8M/i.MX7: initialize SNVS glitch detection for all families
https://git.pengutronix.de/cgit/barebox/commit/?id=f0eaecb91875 (link may not be stable)
[3/4] ARM: i.MX7: snvs: rename imx7_snvs_init -> imx7_setup_snvs
https://git.pengutronix.de/cgit/barebox/commit/?id=536ed336c59f (link may not be stable)
[4/4] ARM: i.MX6UL: initialize SNVS
https://git.pengutronix.de/cgit/barebox/commit/?id=7c4ecef454dd (link may not be stable)
Best regards,
--
Sascha Hauer <s.hauer@pengutronix.de>
^ permalink raw reply [flat|nested] 7+ messages in thread