* [PATCH 0/4] OpenRISC fixes and setjmp/longjmp work @ 2021-03-03 13:50 Stafford Horne 2021-03-03 13:50 ` [PATCH 1/4] openrisc: Use movhi to zero registers Stafford Horne ` (4 more replies) 0 siblings, 5 replies; 8+ messages in thread From: Stafford Horne @ 2021-03-03 13:50 UTC (permalink / raw) To: Barebox; +Cc: Openrisc, Ahmad Fatoum, Stafford Horne Hello, These are the patches I came up with to get the setjmp/longjmp routines to work on OpenRISC. It seems to be working well. The patches are on github here: https://github.com/stffrdhrn/barebox/tree/openrisc-bthread I had to revert a commit to remove openrisc to do this work, I hope that can be reverted. Test output: barebox@or1ksim:/ bthread -v bthread_printer yield #1 bthread_printer yield #2 bthread_printer yield #3 bthread_printer yield #4 36441 bthread yield calls in 1s barebox@or1ksim:/ bthread -v bthread_printer yield #1 bthread_printer yield #2 bthread_printer yield #3 bthread_printer yield #4 36504 bthread yield calls in 1s barebox@or1ksim:/ bthread bthread - print info about registered bthreads print info about registered barebox threads Options: -i Print information about registered bthreads -t measure how many bthreads we currently run in 1s -c count maximum context switches in 1s -v verify correct bthread operation barebox@or1ksim:/ bthread -c bthread -c 269536 bthread context switches possible in 1s Stafford Horne (4): openrisc: Use movhi to zero registers openrisc: Add gitignore for dtb files openrisc: Add linkage.h openrisc: Implement setjmp/longjmp/initjmp arch/openrisc/Kconfig | 1 + arch/openrisc/cpu/start.S | 6 ++-- arch/openrisc/dts/.gitignore | 1 + arch/openrisc/include/asm/linkage.h | 7 ++++ arch/openrisc/include/asm/setjmp.h | 17 +++++++++ arch/openrisc/lib/Makefile | 1 + arch/openrisc/lib/setjmp.S | 56 +++++++++++++++++++++++++++++ 7 files changed, 86 insertions(+), 3 deletions(-) create mode 100644 arch/openrisc/dts/.gitignore create mode 100644 arch/openrisc/include/asm/linkage.h create mode 100644 arch/openrisc/include/asm/setjmp.h create mode 100644 arch/openrisc/lib/setjmp.S -- 2.26.2 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/4] openrisc: Use movhi to zero registers 2021-03-03 13:50 [PATCH 0/4] OpenRISC fixes and setjmp/longjmp work Stafford Horne @ 2021-03-03 13:50 ` Stafford Horne 2021-03-03 13:50 ` [PATCH 2/4] openrisc: Add gitignore for dtb files Stafford Horne ` (3 subsequent siblings) 4 siblings, 0 replies; 8+ messages in thread From: Stafford Horne @ 2021-03-03 13:50 UTC (permalink / raw) To: Barebox; +Cc: Openrisc, Ahmad Fatoum, Stafford Horne This is needed when running on FPGA as registers are not guaranteed to be initialized to 0. Using movhi allows to explicitly set 0. Signed-off-by: Stafford Horne <shorne@gmail.com> --- arch/openrisc/cpu/start.S | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/openrisc/cpu/start.S b/arch/openrisc/cpu/start.S index 7ac790b05..c448d3775 100644 --- a/arch/openrisc/cpu/start.S +++ b/arch/openrisc/cpu/start.S @@ -37,10 +37,10 @@ .org 0x100 __reset: /* there is no guarantee r0 is hardwired to zero, clear it here */ - l.andi r0, r0, 0 + l.movhi r0, 0x0 /* reset stack and frame pointers */ - l.andi r1, r0, 0 - l.andi r2, r0, 0 + l.movhi r1, 0x0 + l.movhi r2, 0x0 /* set supervisor mode */ l.ori r3,r0,SPR_SR_SM -- 2.26.2 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 2/4] openrisc: Add gitignore for dtb files 2021-03-03 13:50 [PATCH 0/4] OpenRISC fixes and setjmp/longjmp work Stafford Horne 2021-03-03 13:50 ` [PATCH 1/4] openrisc: Use movhi to zero registers Stafford Horne @ 2021-03-03 13:50 ` Stafford Horne 2021-03-03 13:50 ` [PATCH 3/4] openrisc: Add linkage.h Stafford Horne ` (2 subsequent siblings) 4 siblings, 0 replies; 8+ messages in thread From: Stafford Horne @ 2021-03-03 13:50 UTC (permalink / raw) To: Barebox; +Cc: Openrisc, Ahmad Fatoum, Stafford Horne Signed-off-by: Stafford Horne <shorne@gmail.com> --- arch/openrisc/dts/.gitignore | 1 + 1 file changed, 1 insertion(+) create mode 100644 arch/openrisc/dts/.gitignore diff --git a/arch/openrisc/dts/.gitignore b/arch/openrisc/dts/.gitignore new file mode 100644 index 000000000..077903c50 --- /dev/null +++ b/arch/openrisc/dts/.gitignore @@ -0,0 +1 @@ +*dtb* -- 2.26.2 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 3/4] openrisc: Add linkage.h 2021-03-03 13:50 [PATCH 0/4] OpenRISC fixes and setjmp/longjmp work Stafford Horne 2021-03-03 13:50 ` [PATCH 1/4] openrisc: Use movhi to zero registers Stafford Horne 2021-03-03 13:50 ` [PATCH 2/4] openrisc: Add gitignore for dtb files Stafford Horne @ 2021-03-03 13:50 ` Stafford Horne 2021-03-03 13:50 ` [PATCH 4/4] openrisc: Implement setjmp/longjmp/initjmp Stafford Horne 2021-03-03 14:03 ` [PATCH 0/4] OpenRISC fixes and setjmp/longjmp work Ahmad Fatoum 4 siblings, 0 replies; 8+ messages in thread From: Stafford Horne @ 2021-03-03 13:50 UTC (permalink / raw) To: Barebox; +Cc: Openrisc, Ahmad Fatoum, Stafford Horne Copied from glibc minus bits we don't need. Signed-off-by: Stafford Horne <shorne@gmail.com> --- arch/openrisc/include/asm/linkage.h | 7 +++++++ 1 file changed, 7 insertions(+) create mode 100644 arch/openrisc/include/asm/linkage.h diff --git a/arch/openrisc/include/asm/linkage.h b/arch/openrisc/include/asm/linkage.h new file mode 100644 index 000000000..dbe4b4e31 --- /dev/null +++ b/arch/openrisc/include/asm/linkage.h @@ -0,0 +1,7 @@ +#ifndef __ASM_LINKAGE_H +#define __ASM_LINKAGE_H + +#define __ALIGN .align 0 +#define __ALIGN_STR ".align 0" + +#endif -- 2.26.2 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 4/4] openrisc: Implement setjmp/longjmp/initjmp 2021-03-03 13:50 [PATCH 0/4] OpenRISC fixes and setjmp/longjmp work Stafford Horne ` (2 preceding siblings ...) 2021-03-03 13:50 ` [PATCH 3/4] openrisc: Add linkage.h Stafford Horne @ 2021-03-03 13:50 ` Stafford Horne 2021-03-03 14:03 ` [PATCH 0/4] OpenRISC fixes and setjmp/longjmp work Ahmad Fatoum 4 siblings, 0 replies; 8+ messages in thread From: Stafford Horne @ 2021-03-03 13:50 UTC (permalink / raw) To: Barebox; +Cc: Openrisc, Ahmad Fatoum, Stafford Horne Tested on or1ksim and this seems to work. This is mostly the same as the glibc port implementation, but adjusted as per requirements per barebox. Signed-off-by: Stafford Horne <shorne@gmail.com> --- arch/openrisc/Kconfig | 1 + arch/openrisc/include/asm/setjmp.h | 17 +++++++++ arch/openrisc/lib/Makefile | 1 + arch/openrisc/lib/setjmp.S | 56 ++++++++++++++++++++++++++++++ 4 files changed, 75 insertions(+) create mode 100644 arch/openrisc/include/asm/setjmp.h create mode 100644 arch/openrisc/lib/setjmp.S diff --git a/arch/openrisc/Kconfig b/arch/openrisc/Kconfig index 32d23029d..bd8851e4b 100644 --- a/arch/openrisc/Kconfig +++ b/arch/openrisc/Kconfig @@ -4,6 +4,7 @@ config OPENRISC select HAS_CACHE select HAVE_CONFIGURABLE_MEMORY_LAYOUT select GENERIC_FIND_NEXT_BIT + select HAS_ARCH_SJLJ default y # not used diff --git a/arch/openrisc/include/asm/setjmp.h b/arch/openrisc/include/asm/setjmp.h new file mode 100644 index 000000000..40f55b7eb --- /dev/null +++ b/arch/openrisc/include/asm/setjmp.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: LGPL-2.1-or-later */ +/* + * Define the machine-dependent type `jmp_buf'. OpenRISC version. + * Copyright (C) 2021 Free Software Foundation, Inc. + * This file is part of the GNU C Library. + */ + +#ifndef _OR1K_BITS_SETJMP_H +#define _OR1K_BITS_SETJMP_H 1 + +typedef long int jmp_buf[13]; + +int setjmp(jmp_buf jmp) __attribute__((returns_twice)); +void longjmp(jmp_buf jmp, int ret) __attribute__((noreturn)); +int initjmp(jmp_buf jmp, void __noreturn (*func)(void), void *stack_top); + +#endif /* _OR1K_BITS_SETJMP_H */ diff --git a/arch/openrisc/lib/Makefile b/arch/openrisc/lib/Makefile index 62082feed..808b09f3a 100644 --- a/arch/openrisc/lib/Makefile +++ b/arch/openrisc/lib/Makefile @@ -5,4 +5,5 @@ obj-y += muldi3.o obj-y += lshrdi3.o obj-y += ashldi3.o obj-y += ashrdi3.o +obj-y += setjmp.o obj-$(CONFIG_BUILTIN_DTB) += dtb.o diff --git a/arch/openrisc/lib/setjmp.S b/arch/openrisc/lib/setjmp.S new file mode 100644 index 000000000..7da347780 --- /dev/null +++ b/arch/openrisc/lib/setjmp.S @@ -0,0 +1,56 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <linux/linkage.h> + +/* int setjmp (jmp_buf); */ +ENTRY(setjmp) + l.sw 0(r3), r1 + l.sw 4(r3), r2 + l.sw 8(r3), r9 + l.sw 12(r3), r10 + l.sw 16(r3), r14 + l.sw 20(r3), r16 + l.sw 24(r3), r18 + l.sw 28(r3), r20 + l.sw 32(r3), r22 + l.sw 36(r3), r24 + l.sw 40(r3), r26 + l.sw 44(r3), r28 + l.sw 48(r3), r30 + l.jr r9 + l.movhi r11, 0x0 +END(setjmp) + +/* volatile void longjmp (jmp_buf, int); */ +ENTRY(longjmp) + l.lwz r1, 0(r3) + l.lwz r2, 4(r3) + + /* if r4 is 0, something wrong, so set it to 1 */ + l.sfeqi r4, 0x0 + l.bnf 1f /* r4 != 0, longjmp value sensible */ + l.nop + l.ori r4, r0, 0x1 /* make nonzero */ +1: + l.lwz r9, 8(r3) + l.lwz r10, 12(r3) + l.lwz r14, 16(r3) + l.lwz r16, 20(r3) + l.lwz r18, 24(r3) + l.lwz r20, 28(r3) + l.lwz r22, 32(r3) + l.lwz r24, 36(r3) + l.lwz r26, 40(r3) + l.lwz r28, 44(r3) + l.lwz r30, 48(r3) + l.jr r9 + l.addi r11, r4, 0x0 +END(longjmp) + +/* int initjmp(jmp_buf jmp, void __noreturn (*func)(void), void *stack_top); */ +ENTRY(initjmp) + l.sw 8(r3), r4 + l.sw 0(r3), r5 + l.jr r9 + l.movhi r11, 0x0 +END(initjmp) -- 2.26.2 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 0/4] OpenRISC fixes and setjmp/longjmp work 2021-03-03 13:50 [PATCH 0/4] OpenRISC fixes and setjmp/longjmp work Stafford Horne ` (3 preceding siblings ...) 2021-03-03 13:50 ` [PATCH 4/4] openrisc: Implement setjmp/longjmp/initjmp Stafford Horne @ 2021-03-03 14:03 ` Ahmad Fatoum 2021-03-03 14:12 ` Stafford Horne 4 siblings, 1 reply; 8+ messages in thread From: Ahmad Fatoum @ 2021-03-03 14:03 UTC (permalink / raw) To: Stafford Horne, Barebox; +Cc: Openrisc Hello Stafford, On 03.03.21 14:50, Stafford Horne wrote: > Hello, > > These are the patches I came up with to get the setjmp/longjmp routines to work > on OpenRISC. It seems to be working well. > > The patches are on github here: > https://github.com/stffrdhrn/barebox/tree/openrisc-bthread > > I had to revert a commit to remove openrisc to do this work, I hope that can be > reverted. Great. Thanks for taking the time! Could this be tested on qemu-system-or1k? If so, it would be great to have this documented in-tree, so future changes could be tested. Cheers, Ahmad > > Test output: > > barebox@or1ksim:/ bthread -v > bthread_printer yield #1 > bthread_printer yield #2 > bthread_printer yield #3 > bthread_printer yield #4 > 36441 bthread yield calls in 1s > barebox@or1ksim:/ bthread -v > bthread_printer yield #1 > bthread_printer yield #2 > bthread_printer yield #3 > bthread_printer yield #4 > 36504 bthread yield calls in 1s > barebox@or1ksim:/ bthread > > bthread - print info about registered bthreads > > print info about registered barebox threads > > Options: > -i Print information about registered bthreads > -t measure how many bthreads we currently run in 1s > -c count maximum context switches in 1s > -v verify correct bthread operation > > barebox@or1ksim:/ bthread -c > bthread -c > 269536 bthread context switches possible in 1s > > Stafford Horne (4): > openrisc: Use movhi to zero registers > openrisc: Add gitignore for dtb files > openrisc: Add linkage.h > openrisc: Implement setjmp/longjmp/initjmp > > arch/openrisc/Kconfig | 1 + > arch/openrisc/cpu/start.S | 6 ++-- > arch/openrisc/dts/.gitignore | 1 + > arch/openrisc/include/asm/linkage.h | 7 ++++ > arch/openrisc/include/asm/setjmp.h | 17 +++++++++ > arch/openrisc/lib/Makefile | 1 + > arch/openrisc/lib/setjmp.S | 56 +++++++++++++++++++++++++++++ > 7 files changed, 86 insertions(+), 3 deletions(-) > create mode 100644 arch/openrisc/dts/.gitignore > create mode 100644 arch/openrisc/include/asm/linkage.h > create mode 100644 arch/openrisc/include/asm/setjmp.h > create mode 100644 arch/openrisc/lib/setjmp.S > -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 0/4] OpenRISC fixes and setjmp/longjmp work 2021-03-03 14:03 ` [PATCH 0/4] OpenRISC fixes and setjmp/longjmp work Ahmad Fatoum @ 2021-03-03 14:12 ` Stafford Horne 2021-03-03 20:25 ` Stafford Horne 0 siblings, 1 reply; 8+ messages in thread From: Stafford Horne @ 2021-03-03 14:12 UTC (permalink / raw) To: Ahmad Fatoum; +Cc: Barebox, Openrisc On Wed, Mar 03, 2021 at 03:03:11PM +0100, Ahmad Fatoum wrote: > Hello Stafford, > > On 03.03.21 14:50, Stafford Horne wrote: > > Hello, > > > > These are the patches I came up with to get the setjmp/longjmp routines to work > > on OpenRISC. It seems to be working well. > > > > The patches are on github here: > > https://github.com/stffrdhrn/barebox/tree/openrisc-bthread > > > > I had to revert a commit to remove openrisc to do this work, I hope that can be > > reverted. > > Great. Thanks for taking the time! > Could this be tested on qemu-system-or1k? If so, it would be great to have this > documented in-tree, so future changes could be tested. Sure, I will try to get it working. For some reason qemu was getting hung. Give me a few days. -Stafford _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 0/4] OpenRISC fixes and setjmp/longjmp work 2021-03-03 14:12 ` Stafford Horne @ 2021-03-03 20:25 ` Stafford Horne 0 siblings, 0 replies; 8+ messages in thread From: Stafford Horne @ 2021-03-03 20:25 UTC (permalink / raw) To: Ahmad Fatoum; +Cc: Barebox, Openrisc On Wed, Mar 03, 2021 at 11:12:14PM +0900, Stafford Horne wrote: > On Wed, Mar 03, 2021 at 03:03:11PM +0100, Ahmad Fatoum wrote: > > Hello Stafford, > > > > On 03.03.21 14:50, Stafford Horne wrote: > > > Hello, > > > > > > These are the patches I came up with to get the setjmp/longjmp routines to work > > > on OpenRISC. It seems to be working well. > > > > > > The patches are on github here: > > > https://github.com/stffrdhrn/barebox/tree/openrisc-bthread > > > > > > I had to revert a commit to remove openrisc to do this work, I hope that can be > > > reverted. > > > > Great. Thanks for taking the time! > > Could this be tested on qemu-system-or1k? If so, it would be great to have this > > documented in-tree, so future changes could be tested. > > Sure, I will try to get it working. For some reason qemu was getting hung. > > Give me a few days. Got it working and posted a sepaate patch. I will add documentation as well, but here is what I ran. It should be similar to what I documented on the qemu wiki: https://wiki.qemu.org/Documentation/Platforms/OpenRISC $ /home/shorne/work/openrisc/qemu/build/or1k-softmmu/qemu-system-or1k -cpu or1200 \ -M or1k-sim \ -kernel /home/shorne/work/openrisc/barebox/barebox \ -net nic -net tap,ifname=tap0,script=no,downscript=no \ -serial mon:stdio -nographic \ -gdb tcp::10001 \ -m 32 barebox 2021.02.0-00120-g763c6fee7-dirty #14 Thu Mar 4 05:13:51 JST 2021 Board: or1ksim mdio_bus: miibus0: probed malloc space: 0x01b80000 -> 0x01f7ffff (size 4 MiB) Hit any to stop autoboot: 3 barebox@or1ksim:/ barebox@or1ksim:/ barebox@or1ksim:/ bthread -v bthread_printer yield #1 bthread_printer yield #2 bthread_printer yield #3 bthread_printer yield #4 9963 bthread yield calls in 1s -Stafford _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2021-03-04 1:08 UTC | newest] Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-03-03 13:50 [PATCH 0/4] OpenRISC fixes and setjmp/longjmp work Stafford Horne 2021-03-03 13:50 ` [PATCH 1/4] openrisc: Use movhi to zero registers Stafford Horne 2021-03-03 13:50 ` [PATCH 2/4] openrisc: Add gitignore for dtb files Stafford Horne 2021-03-03 13:50 ` [PATCH 3/4] openrisc: Add linkage.h Stafford Horne 2021-03-03 13:50 ` [PATCH 4/4] openrisc: Implement setjmp/longjmp/initjmp Stafford Horne 2021-03-03 14:03 ` [PATCH 0/4] OpenRISC fixes and setjmp/longjmp work Ahmad Fatoum 2021-03-03 14:12 ` Stafford Horne 2021-03-03 20:25 ` Stafford Horne
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