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From: Antony Pavlov <antonynpavlov@gmail.com>
To: barebox@lists.infradead.org
Cc: Ahmad Fatoum <a.fatoum@pengutronix.de>
Subject: [PATCH v2 02/11] RISC-V: make RISCV_SBI and RISCV_M_MODE explicitly mutually exclusive
Date: Fri,  7 May 2021 01:08:25 +0300	[thread overview]
Message-ID: <20210506220834.223350-3-antonynpavlov@gmail.com> (raw)
In-Reply-To: <20210506220834.223350-1-antonynpavlov@gmail.com>

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
 arch/riscv/Kconfig                         | 22 ++++++++++++----------
 arch/riscv/Kconfig.socs                    |  4 +++-
 arch/riscv/configs/erizo_generic_defconfig |  1 +
 3 files changed, 16 insertions(+), 11 deletions(-)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index a4aa799acf..dcff00d63f 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -38,6 +38,18 @@ config ARCH_RV64I
 
 endchoice
 
+choice
+	prompt "Privilege level"
+	default RISCV_SBI
+
+config RISCV_SBI
+	bool "S-mode (supervisor mode), use SBI calls"
+
+config RISCV_M_MODE
+	bool "M-mode (machine mode)"
+
+endchoice
+
 source "arch/riscv/Kconfig.socs"
 
 config CPU_SUPPORTS_32BIT_KERNEL
@@ -97,14 +109,4 @@ config NMON_HELP
 	  Say yes here to get the nmon commands message on
 	  every nmon start.
 
-# set if we run in machine mode, cleared if we run in supervisor mode
-config RISCV_M_MODE
-	bool
-
-# set if we are running in S-mode and can use SBI calls
-config RISCV_SBI
-	bool
-	depends on !RISCV_M_MODE
-	default y
-
 endmenu
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index c6875738d0..f767942f34 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -3,10 +3,10 @@ menu "SoC selection"
 config SOC_ERIZO
 	bool "Erizo SoC"
 	depends on ARCH_RV32I
+	depends on RISCV_M_MODE
 	select HAS_ASM_DEBUG_LL
 	select HAS_NMON
 	select USE_COMPRESSED_DTB
-	select RISCV_M_MODE
 	select RISCV_TIMER
 
 config BOARD_ERIZO_GENERIC
@@ -15,6 +15,7 @@ config BOARD_ERIZO_GENERIC
 
 config SOC_VIRT
 	bool "QEMU Virt Machine"
+	depends on RISCV_SBI
 	select BOARD_RISCV_GENERIC_DT
 	select CLINT_TIMER
 	help
@@ -23,6 +24,7 @@ config SOC_VIRT
 
 config SOC_SIFIVE
 	bool "SiFive SoCs"
+	depends on RISCV_SBI
 	select CLK_SIFIVE
 	select CLK_SIFIVE_PRCI
 	select RISCV_TIMER
diff --git a/arch/riscv/configs/erizo_generic_defconfig b/arch/riscv/configs/erizo_generic_defconfig
index 247a179130..16168eef66 100644
--- a/arch/riscv/configs/erizo_generic_defconfig
+++ b/arch/riscv/configs/erizo_generic_defconfig
@@ -1,3 +1,4 @@
+CONFIG_RISCV_M_MODE=y
 CONFIG_SOC_ERIZO=y
 # CONFIG_GLOBALVAR is not set
 CONFIG_STACK_SIZE=0x20000
-- 
2.31.1


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  parent reply	other threads:[~2021-05-06 22:10 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-06 22:08 [PATCH v2 00/11] RISC-V: add LiteX SoC support; resurrect nmon Antony Pavlov
2021-05-06 22:08 ` [PATCH v2 01/11] clocksource: timer-riscv: select CSR from device tree Antony Pavlov
2021-05-07 11:34   ` Ahmad Fatoum
2021-05-07 17:41     ` Antony Pavlov
2021-05-07 18:05       ` Ahmad Fatoum
2021-05-06 22:08 ` Antony Pavlov [this message]
2021-05-07 11:42   ` [PATCH v2 02/11] RISC-V: make RISCV_SBI and RISCV_M_MODE explicitly mutually exclusive Ahmad Fatoum
2021-05-07 14:25     ` Antony Pavlov
2021-05-07 14:44       ` Ahmad Fatoum
2021-05-07 17:52         ` Antony Pavlov
2021-05-07 18:08           ` Ahmad Fatoum
2021-05-07 18:36             ` Antony Pavlov
2021-05-06 22:08 ` [PATCH v2 03/11] RISC-V: make it possible to run nmon from PBL C code Antony Pavlov
2021-05-06 22:08 ` [PATCH v2 04/11] RISC-V: boards: erizo: make it possible to use nmon Antony Pavlov
2021-05-06 22:08 ` [PATCH v2 05/11] serial: add litex UART driver Antony Pavlov
2021-05-07 11:45   ` Ahmad Fatoum
2021-05-07 12:02     ` Antony Pavlov
2021-05-06 22:08 ` [PATCH v2 06/11] gpio: add driver for 74xx-ICs with MMIO access Antony Pavlov
2021-05-06 22:08 ` [PATCH v2 07/11] spi: add litex spiflash driver Antony Pavlov
2021-05-06 22:08 ` [PATCH v2 08/11] net: add LiteEth driver Antony Pavlov
2021-05-06 22:08 ` [PATCH v2 09/11] RISC-V: add LiteX SoC and linux-on-litex-vexriscv support Antony Pavlov
2021-05-06 22:08 ` [PATCH v2 10/11] RISC-V: add litex_linux_defconfig Antony Pavlov
2021-05-06 22:08 ` [PATCH v2 11/11] RISC-V: make it possible to build RV32I multi-image with DEBUG_LL=n Antony Pavlov
2021-05-07 10:27   ` Ahmad Fatoum
2021-05-07 10:23 ` [PATCH v2 00/11] RISC-V: add LiteX SoC support; resurrect nmon Ahmad Fatoum
2021-05-07 11:12   ` Antony Pavlov

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