From: Sascha Hauer <s.hauer@pengutronix.de>
To: Barebox List <barebox@lists.infradead.org>
Subject: [PATCH v2 00/24] clk updates
Date: Wed, 2 Jun 2021 11:54:43 +0200 [thread overview]
Message-ID: <20210602095507.24609-1-s.hauer@pengutronix.de> (raw)
The barebox clk framework has diverged a lot from Linux. Specifically
the separation of a struct clk_hw from struct clk causes some pain when
porting over code from Linux. This series aims to reduce the differences
a bit. New this time is the addition of the rk3568 clock code which is
a first step to get rk3568 up.
Changes since v1:
- Make exported clk ops const
- Add more patches to get closer to Linux
- Update Rockchip Clock support to current Linux
- Add rk3568 clk support
Sascha Hauer (24):
clk: clk-mux: Fix handling of CLK_MUX_HIWORD_MASK
clk: introduce clk init op
clk: rename clk_register() to bclk_register()
clk: introduce struct clk_hw
clk: introduce clk_register()
clk: divider: Make clk_divider_ops const
clk: divider: Add ro ops
clk: divider: Make clk_mux_ops const
clk: mux: Add ro ops
clk: move fixed_factor to include/linux/clk.h
Add rational_best_approximation()
clk: Update fractional divider from Linux
clk: Add lock to different clock types
clk: Add Linux functions to register a divider
clk: Add Linux functions to register a fixed factor clock
clk: Add Linux functions to register a gate
clk: Add Linux functions to register a mux
clk: Add CLK_GET_RATE_NOCACHE
clk: Rename CLK_GATE_INVERTED to CLK_GATE_SET_TO_DISABLE
clk: implement CLK_SET_RATE_UNGATE
clk: implement set/get phase
regmap: Add regmap_read_poll_timeout
clk: rockchip: Update to current Linux
clk: Rockchip: Add rk3568 clk support
drivers/clk/at91/clk-audio-pll.c | 103 +-
drivers/clk/at91/clk-generated.c | 42 +-
drivers/clk/at91/clk-h32mx.c | 22 +-
drivers/clk/at91/clk-i2s-mux.c | 24 +-
drivers/clk/at91/clk-main.c | 126 +-
drivers/clk/at91/clk-master.c | 32 +-
drivers/clk/at91/clk-peripheral.c | 72 +-
drivers/clk/at91/clk-pll.c | 40 +-
drivers/clk/at91/clk-plldiv.c | 26 +-
drivers/clk/at91/clk-programmable.c | 32 +-
drivers/clk/at91/clk-sam9x60-pll.c | 28 +-
drivers/clk/at91/clk-slow.c | 20 +-
drivers/clk/at91/clk-smd.c | 36 +-
drivers/clk/at91/clk-system.c | 28 +-
drivers/clk/at91/clk-usb.c | 92 +-
drivers/clk/at91/clk-utmi.c | 32 +-
drivers/clk/at91/sckc.c | 114 +-
drivers/clk/clk-ar933x.c | 18 +-
drivers/clk/clk-ar9344.c | 18 +-
drivers/clk/clk-composite.c | 74 +-
drivers/clk/clk-divider.c | 78 +-
drivers/clk/clk-fixed-factor.c | 44 +-
drivers/clk/clk-fixed.c | 20 +-
drivers/clk/clk-fractional-divider.c | 133 +-
drivers/clk/clk-gate-shared.c | 33 +-
drivers/clk/clk-gate.c | 52 +-
drivers/clk/clk-gpio.c | 32 +-
drivers/clk/clk-mux.c | 48 +-
drivers/clk/clk-qoric.c | 34 +-
drivers/clk/clk-stm32mp1.c | 103 +-
drivers/clk/clk.c | 207 ++-
drivers/clk/imx/clk-composite-8m.c | 33 +-
drivers/clk/imx/clk-cpu.c | 32 +-
drivers/clk/imx/clk-frac-pll.c | 38 +-
drivers/clk/imx/clk-gate-exclusive.c | 36 +-
drivers/clk/imx/clk-gate2.c | 45 +-
drivers/clk/imx/clk-imx6ul.c | 4 +-
drivers/clk/imx/clk-pfd.c | 34 +-
drivers/clk/imx/clk-pll14xx.c | 47 +-
drivers/clk/imx/clk-pllv1.c | 18 +-
drivers/clk/imx/clk-pllv2.c | 24 +-
drivers/clk/imx/clk-pllv3.c | 70 +-
drivers/clk/imx/clk-sccg-pll.c | 51 +-
drivers/clk/loongson/clk-ls1b200.c | 18 +-
drivers/clk/mvebu/corediv.c | 30 +-
drivers/clk/mxs/clk-div.c | 36 +-
drivers/clk/mxs/clk-frac.c | 30 +-
drivers/clk/mxs/clk-lcdif.c | 20 +-
drivers/clk/mxs/clk-pll.c | 32 +-
drivers/clk/mxs/clk-ref.c | 38 +-
drivers/clk/rockchip/Makefile | 3 +-
drivers/clk/rockchip/clk-cpu.c | 82 +-
drivers/clk/rockchip/clk-inverter.c | 107 ++
drivers/clk/rockchip/clk-mmc-phase.c | 192 +++
drivers/clk/rockchip/clk-muxgrf.c | 95 ++
drivers/clk/rockchip/clk-pll.c | 853 ++++++++++--
drivers/clk/rockchip/clk-rk3188.c | 363 ++---
drivers/clk/rockchip/clk-rk3288.c | 309 ++--
drivers/clk/rockchip/clk-rk3568.c | 1704 +++++++++++++++++++++++
drivers/clk/rockchip/clk.c | 489 +++++--
drivers/clk/rockchip/clk.h | 500 ++++++-
drivers/clk/socfpga/clk-gate-a10.c | 32 +-
drivers/clk/socfpga/clk-periph-a10.c | 28 +-
drivers/clk/socfpga/clk-pll-a10.c | 30 +-
drivers/clk/socfpga/clk.c | 74 +-
drivers/clk/socfpga/clk.h | 6 +-
drivers/clk/tegra/clk-divider.c | 17 +-
drivers/clk/tegra/clk-periph.c | 44 +-
drivers/clk/tegra/clk-pll-out.c | 30 +-
drivers/clk/tegra/clk-pll.c | 52 +-
drivers/clk/tegra/clk.h | 6 +-
drivers/clk/vexpress/clk-sp810.c | 24 +-
drivers/clk/zynq/clkc.c | 100 +-
drivers/clk/zynqmp/clk-divider-zynqmp.c | 30 +-
drivers/clk/zynqmp/clk-gate-zynqmp.c | 30 +-
drivers/clk/zynqmp/clk-mux-zynqmp.c | 30 +-
drivers/clk/zynqmp/clk-pll-zynqmp.c | 48 +-
drivers/video/imx-ipu-v3/ipu-di.c | 17 +-
include/linux/clk.h | 199 ++-
include/linux/rational.h | 20 +
include/regmap.h | 24 +
lib/math/Makefile | 1 +
lib/math/rational.c | 100 ++
83 files changed, 6089 insertions(+), 1949 deletions(-)
create mode 100644 drivers/clk/rockchip/clk-inverter.c
create mode 100644 drivers/clk/rockchip/clk-mmc-phase.c
create mode 100644 drivers/clk/rockchip/clk-muxgrf.c
create mode 100644 drivers/clk/rockchip/clk-rk3568.c
create mode 100644 include/linux/rational.h
create mode 100644 lib/math/rational.c
--
2.29.2
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next reply other threads:[~2021-06-02 10:04 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-02 9:54 Sascha Hauer [this message]
2021-06-02 9:54 ` [PATCH 01/24] clk: clk-mux: Fix handling of CLK_MUX_HIWORD_MASK Sascha Hauer
2021-06-02 15:18 ` Ahmad Fatoum
2021-06-02 9:54 ` [PATCH 02/24] clk: introduce clk init op Sascha Hauer
2021-06-02 9:54 ` [PATCH 03/24] clk: rename clk_register() to bclk_register() Sascha Hauer
2021-06-02 9:54 ` [PATCH 04/24] clk: introduce struct clk_hw Sascha Hauer
2021-06-11 7:55 ` Ahmad Fatoum
2021-06-11 8:41 ` Sascha Hauer
2021-06-11 9:19 ` Ahmad Fatoum
2021-06-11 11:46 ` Sascha Hauer
2021-06-11 12:14 ` Ahmad Fatoum
2021-06-02 9:54 ` [PATCH 05/24] clk: introduce clk_register() Sascha Hauer
2021-06-02 9:54 ` [PATCH 06/24] clk: divider: Make clk_divider_ops const Sascha Hauer
2021-06-02 9:54 ` [PATCH 07/24] clk: divider: Add ro ops Sascha Hauer
2021-06-02 9:54 ` [PATCH 08/24] clk: divider: Make clk_mux_ops const Sascha Hauer
2021-06-02 9:54 ` [PATCH 09/24] clk: mux: Add ro ops Sascha Hauer
2021-06-02 9:54 ` [PATCH 10/24] clk: move fixed_factor to include/linux/clk.h Sascha Hauer
2021-06-02 9:54 ` [PATCH 11/24] Add rational_best_approximation() Sascha Hauer
2021-06-02 18:25 ` Trent Piepho
2021-06-07 11:22 ` Sascha Hauer
2021-06-02 9:54 ` [PATCH 12/24] clk: Update fractional divider from Linux Sascha Hauer
2021-06-02 9:54 ` [PATCH 13/24] clk: Add lock to different clock types Sascha Hauer
2021-06-02 9:54 ` [PATCH 14/24] clk: Add Linux functions to register a divider Sascha Hauer
2021-06-02 9:54 ` [PATCH 15/24] clk: Add Linux functions to register a fixed factor clock Sascha Hauer
2021-06-02 9:54 ` [PATCH 16/24] clk: Add Linux functions to register a gate Sascha Hauer
2021-06-02 9:55 ` [PATCH 17/24] clk: Add Linux functions to register a mux Sascha Hauer
2021-06-02 9:55 ` [PATCH 18/24] clk: Add CLK_GET_RATE_NOCACHE Sascha Hauer
2021-06-02 9:55 ` [PATCH 19/24] clk: Rename CLK_GATE_INVERTED to CLK_GATE_SET_TO_DISABLE Sascha Hauer
2021-06-02 9:55 ` [PATCH 20/24] clk: implement CLK_SET_RATE_UNGATE Sascha Hauer
2021-06-02 9:55 ` [PATCH 21/24] clk: implement set/get phase Sascha Hauer
2021-06-02 9:55 ` [PATCH 22/24] regmap: Add regmap_read_poll_timeout Sascha Hauer
2021-06-02 9:55 ` [PATCH 23/24] clk: rockchip: Update to current Linux Sascha Hauer
2021-06-02 9:55 ` [PATCH 24/24] clk: Rockchip: Add rk3568 clk support Sascha Hauer
2021-06-09 9:18 ` Ahmad Fatoum
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