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From: Sascha Hauer <s.hauer@pengutronix.de>
To: Barebox List <barebox@lists.infradead.org>
Subject: [PATCH 19/24] clk: Rename CLK_GATE_INVERTED to CLK_GATE_SET_TO_DISABLE
Date: Wed,  2 Jun 2021 11:55:02 +0200	[thread overview]
Message-ID: <20210602095507.24609-20-s.hauer@pengutronix.de> (raw)
In-Reply-To: <20210602095507.24609-1-s.hauer@pengutronix.de>

Rename CLK_GATE_INVERTED to CLK_GATE_SET_TO_DISABLE as done in Linux.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 drivers/clk/clk-gate.c      | 8 ++++----
 drivers/clk/imx/clk-gate2.c | 9 ++++-----
 include/linux/clk.h         | 2 +-
 3 files changed, 9 insertions(+), 10 deletions(-)

diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c
index 87b7e73aa6..3cfd707238 100644
--- a/drivers/clk/clk-gate.c
+++ b/drivers/clk/clk-gate.c
@@ -13,7 +13,7 @@
 static void clk_gate_endisable(struct clk_hw *hw, int enable)
 {
 	struct clk_gate *gate = container_of(hw, struct clk_gate, hw);
-	int set = gate->flags & CLK_GATE_INVERTED ? 1 : 0;
+	int set = gate->flags & CLK_GATE_SET_TO_DISABLE ? 1 : 0;
 	u32 val;
 
 	set ^= enable;
@@ -54,9 +54,9 @@ int clk_gate_is_enabled(struct clk_hw *hw)
 	val = readl(g->reg);
 
 	if (val & (1 << g->shift))
-		return g->flags & CLK_GATE_INVERTED ? 0 : 1;
+		return g->flags & CLK_GATE_SET_TO_DISABLE ? 0 : 1;
 	else
-		return g->flags & CLK_GATE_INVERTED ? 1 : 0;
+		return g->flags & CLK_GATE_SET_TO_DISABLE ? 1 : 0;
 }
 
 struct clk_ops clk_gate_ops = {
@@ -114,7 +114,7 @@ struct clk *clk_gate(const char *name, const char *parent, void __iomem *reg,
 struct clk *clk_gate_inverted(const char *name, const char *parent,
 		void __iomem *reg, u8 shift, unsigned flags)
 {
-	return clk_gate(name, parent, reg, shift, flags, CLK_GATE_INVERTED);
+	return clk_gate(name, parent, reg, shift, flags, CLK_GATE_SET_TO_DISABLE);
 }
 
 struct clk *clk_register_gate(struct device_d *dev, const char *name,
diff --git a/drivers/clk/imx/clk-gate2.c b/drivers/clk/imx/clk-gate2.c
index 8866a5365b..af83e93b12 100644
--- a/drivers/clk/imx/clk-gate2.c
+++ b/drivers/clk/imx/clk-gate2.c
@@ -18,7 +18,6 @@ struct clk_gate2 {
 	int shift;
 	u8 cgr_val;
 	const char *parent;
-#define CLK_GATE_INVERTED	(1 << 0)
 	unsigned flags;
 };
 
@@ -34,7 +33,7 @@ static int clk_gate2_enable(struct clk_hw *hw)
 
 	val = readl(g->reg);
 
-	if (g->flags & CLK_GATE_INVERTED)
+	if (g->flags & CLK_GATE_SET_TO_DISABLE)
 		val &= ~(3 << g->shift);
 	else
 		val |= g->cgr_val << g->shift;
@@ -51,7 +50,7 @@ static void clk_gate2_disable(struct clk_hw *hw)
 
 	val = readl(g->reg);
 
-	if (g->flags & CLK_GATE_INVERTED)
+	if (g->flags & CLK_GATE_SET_TO_DISABLE)
 		val |= 3 << g->shift;
 	else
 		val &= ~(3 << g->shift);
@@ -67,9 +66,9 @@ static int clk_gate2_is_enabled(struct clk_hw *hw)
 	val = readl(g->reg);
 
 	if (val & (1 << g->shift))
-		return g->flags & CLK_GATE_INVERTED ? 0 : 1;
+		return g->flags & CLK_GATE_SET_TO_DISABLE ? 0 : 1;
 	else
-		return g->flags & CLK_GATE_INVERTED ? 1 : 0;
+		return g->flags & CLK_GATE_SET_TO_DISABLE ? 1 : 0;
 }
 
 static struct clk_ops clk_gate2_ops = {
diff --git a/include/linux/clk.h b/include/linux/clk.h
index c49604fe2d..d53699a874 100644
--- a/include/linux/clk.h
+++ b/include/linux/clk.h
@@ -339,7 +339,7 @@ static inline void clk_put(struct clk *clk)
 /* parents need enable during gate/ungate, set rate and re-parent */
 #define CLK_OPS_PARENT_ENABLE   (1 << 12)
 
-#define CLK_GATE_INVERTED	(1 << 0)
+#define CLK_GATE_SET_TO_DISABLE	(1 << 0)
 #define CLK_GATE_HIWORD_MASK	(1 << 1)
 
 struct clk_ops {
-- 
2.29.2


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  parent reply	other threads:[~2021-06-02 10:07 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-02  9:54 [PATCH v2 00/24] clk updates Sascha Hauer
2021-06-02  9:54 ` [PATCH 01/24] clk: clk-mux: Fix handling of CLK_MUX_HIWORD_MASK Sascha Hauer
2021-06-02 15:18   ` Ahmad Fatoum
2021-06-02  9:54 ` [PATCH 02/24] clk: introduce clk init op Sascha Hauer
2021-06-02  9:54 ` [PATCH 03/24] clk: rename clk_register() to bclk_register() Sascha Hauer
2021-06-02  9:54 ` [PATCH 04/24] clk: introduce struct clk_hw Sascha Hauer
2021-06-11  7:55   ` Ahmad Fatoum
2021-06-11  8:41     ` Sascha Hauer
2021-06-11  9:19       ` Ahmad Fatoum
2021-06-11 11:46         ` Sascha Hauer
2021-06-11 12:14           ` Ahmad Fatoum
2021-06-02  9:54 ` [PATCH 05/24] clk: introduce clk_register() Sascha Hauer
2021-06-02  9:54 ` [PATCH 06/24] clk: divider: Make clk_divider_ops const Sascha Hauer
2021-06-02  9:54 ` [PATCH 07/24] clk: divider: Add ro ops Sascha Hauer
2021-06-02  9:54 ` [PATCH 08/24] clk: divider: Make clk_mux_ops const Sascha Hauer
2021-06-02  9:54 ` [PATCH 09/24] clk: mux: Add ro ops Sascha Hauer
2021-06-02  9:54 ` [PATCH 10/24] clk: move fixed_factor to include/linux/clk.h Sascha Hauer
2021-06-02  9:54 ` [PATCH 11/24] Add rational_best_approximation() Sascha Hauer
2021-06-02 18:25   ` Trent Piepho
2021-06-07 11:22     ` Sascha Hauer
2021-06-02  9:54 ` [PATCH 12/24] clk: Update fractional divider from Linux Sascha Hauer
2021-06-02  9:54 ` [PATCH 13/24] clk: Add lock to different clock types Sascha Hauer
2021-06-02  9:54 ` [PATCH 14/24] clk: Add Linux functions to register a divider Sascha Hauer
2021-06-02  9:54 ` [PATCH 15/24] clk: Add Linux functions to register a fixed factor clock Sascha Hauer
2021-06-02  9:54 ` [PATCH 16/24] clk: Add Linux functions to register a gate Sascha Hauer
2021-06-02  9:55 ` [PATCH 17/24] clk: Add Linux functions to register a mux Sascha Hauer
2021-06-02  9:55 ` [PATCH 18/24] clk: Add CLK_GET_RATE_NOCACHE Sascha Hauer
2021-06-02  9:55 ` Sascha Hauer [this message]
2021-06-02  9:55 ` [PATCH 20/24] clk: implement CLK_SET_RATE_UNGATE Sascha Hauer
2021-06-02  9:55 ` [PATCH 21/24] clk: implement set/get phase Sascha Hauer
2021-06-02  9:55 ` [PATCH 22/24] regmap: Add regmap_read_poll_timeout Sascha Hauer
2021-06-02  9:55 ` [PATCH 23/24] clk: rockchip: Update to current Linux Sascha Hauer
2021-06-02  9:55 ` [PATCH 24/24] clk: Rockchip: Add rk3568 clk support Sascha Hauer
2021-06-09  9:18   ` Ahmad Fatoum

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