[PATCH 1/9] RISC-V: virt: activate all consoles

[PATCH 1/9] RISC-V: virt: activate all consoles

[Ahmad Fatoum]

While CONSOLE_ACTIVATE_NONE + stdout-path is usually the way to go, main
console on this platform can be virtio console, which can't be
referenced as is in DT, so just enable all consoles.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 arch/riscv/configs/virt32_defconfig | 1 +
 arch/riscv/configs/virt64_defconfig | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/riscv/configs/virt32_defconfig b/arch/riscv/configs/virt32_defconfig
index 1d7b70fc0fbc..ea7d1de8be68 100644
--- a/arch/riscv/configs/virt32_defconfig
+++ b/arch/riscv/configs/virt32_defconfig
@@ -10,6 +10,7 @@ CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_CONSOLE_ACTIVATE_ALL=y
 CONFIG_CONSOLE_ALLOW_COLOR=y
 CONFIG_PBL_CONSOLE=y
 CONFIG_PARTITION_DISK_EFI=y
diff --git a/arch/riscv/configs/virt64_defconfig b/arch/riscv/configs/virt64_defconfig
index 8c66e3e574ff..b1c7a6712ac3 100644
--- a/arch/riscv/configs/virt64_defconfig
+++ b/arch/riscv/configs/virt64_defconfig
@@ -11,6 +11,7 @@ CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_CONSOLE_ACTIVATE_ALL=y
 CONFIG_CONSOLE_ALLOW_COLOR=y
 CONFIG_PBL_CONSOLE=y
 CONFIG_PARTITION_DISK_EFI=y
-- 
2.30.2


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[PATCH 2/9] power: reset: add RISC-V/UC Berkely HTIF poweroff driver support

[Ahmad Fatoum]

We already have a driver in board code and device tree passed by
emulator already has a node for it. Match against it and create a proper
driver.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 arch/riscv/boards/riscvemu/board.c  | 15 ----------
 arch/riscv/configs/virt32_defconfig |  1 +
 arch/riscv/configs/virt64_defconfig |  1 +
 arch/riscv/include/asm/htif.h       | 31 +++++++++++++++++++
 drivers/power/reset/Kconfig         |  7 +++++
 drivers/power/reset/Makefile        |  1 +
 drivers/power/reset/htif-poweroff.c | 46 +++++++++++++++++++++++++++++
 7 files changed, 87 insertions(+), 15 deletions(-)
 create mode 100644 arch/riscv/include/asm/htif.h
 create mode 100644 drivers/power/reset/htif-poweroff.c

diff --git a/arch/riscv/boards/riscvemu/board.c b/arch/riscv/boards/riscvemu/board.c
index 7dbf9afe4c2d..73d787a8335a 100644
--- a/arch/riscv/boards/riscvemu/board.c
+++ b/arch/riscv/boards/riscvemu/board.c
@@ -16,18 +16,6 @@ struct riscvemu_priv {
 
 };
 
-#define HTIF_BASE_ADDR		IOMEM(0x40008000)
-#define HTIF_TOHOST_LOW		(HTIF_BASE_ADDR + 0)
-#define HTIF_TOHOST_HIGH	(HTIF_BASE_ADDR + 4)
-
-static void __noreturn riscvemu_poweroff(struct poweroff_handler *pwr)
-{
-	writel(1, HTIF_TOHOST_LOW);
-	writel(0, HTIF_TOHOST_HIGH);
-
-	__builtin_unreachable();
-}
-
 static void __noreturn riscvemu_restart(struct restart_handler *rst)
 {
 	struct riscvemu_priv *priv = container_of(rst, struct riscvemu_priv, rst);
@@ -46,9 +34,6 @@ static int riscvemu_probe(struct device_d *dev)
 	struct riscvemu_priv *priv;
 	u64 start;
 
-	if (of_find_compatible_node(NULL, NULL, "ucb,htif0"))
-		poweroff_handler_register_fn(riscvemu_poweroff);
-
 	of_chosen = of_find_node_by_path("/chosen");
 
 	if (of_property_read_u64(of_chosen, "riscv,kernel-start", &start))
diff --git a/arch/riscv/configs/virt32_defconfig b/arch/riscv/configs/virt32_defconfig
index ea7d1de8be68..bfea7771efd8 100644
--- a/arch/riscv/configs/virt32_defconfig
+++ b/arch/riscv/configs/virt32_defconfig
@@ -109,6 +109,7 @@ CONFIG_BLK_DEV_NVME=y
 CONFIG_SYSCON_REBOOT_MODE=y
 CONFIG_POWER_RESET_SYSCON=y
 CONFIG_POWER_RESET_SYSCON_POWEROFF=y
+CONFIG_POWER_RESET_HTIF_POWEROFF=y
 CONFIG_VIRTIO_MMIO=y
 CONFIG_FS_EXT4=y
 CONFIG_FS_TFTP=y
diff --git a/arch/riscv/configs/virt64_defconfig b/arch/riscv/configs/virt64_defconfig
index b1c7a6712ac3..2ddc174b8a65 100644
--- a/arch/riscv/configs/virt64_defconfig
+++ b/arch/riscv/configs/virt64_defconfig
@@ -110,6 +110,7 @@ CONFIG_BLK_DEV_NVME=y
 CONFIG_SYSCON_REBOOT_MODE=y
 CONFIG_POWER_RESET_SYSCON=y
 CONFIG_POWER_RESET_SYSCON_POWEROFF=y
+CONFIG_POWER_RESET_HTIF_POWEROFF=y
 CONFIG_VIRTIO_MMIO=y
 CONFIG_FS_EXT4=y
 CONFIG_FS_TFTP=y
diff --git a/arch/riscv/include/asm/htif.h b/arch/riscv/include/asm/htif.h
new file mode 100644
index 000000000000..7312f09d2e6e
--- /dev/null
+++ b/arch/riscv/include/asm/htif.h
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2021 Ahmad Fatoum, Pengutronix
+ */
+
+#ifndef __ASM_HTIF_LL__
+#define __ASM_HTIF_LL__
+
+#define HTIF_DEFAULT_BASE_ADDR		0x40008000
+
+#define HTIF_DEV_SYSCALL		0
+#define		HTIF_CMD_SYSCALL	0
+
+#ifndef __ASSEMBLY__
+
+#include <linux/types.h>
+#include <io-64-nonatomic-lo-hi.h>
+
+static inline void __htif_tohost(void __iomem *htif, u8 device, u8 command, u64 arg)
+{
+	writeq(((u64)device << 56) | ((u64)command << 48) | arg, htif);
+}
+
+static inline void htif_tohost(u8 device, u8 command, u64 arg)
+{
+	__htif_tohost(IOMEM(HTIF_DEFAULT_BASE_ADDR), device, command, arg);
+}
+
+#endif
+
+#endif
diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index e4151d8bc608..968d4b8ba47d 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -54,3 +54,10 @@ config POWER_RESET_GPIO_RESTART
 	  This driver supports restarting your board via a GPIO line.
 	  If your board needs a GPIO high/low to restart, say Y and
 	  create a binding in your devicetree.
+
+config POWER_RESET_HTIF_POWEROFF
+	bool "HTIF poweroff driver"
+	depends on RISCV
+	help
+	  Adds poweroff support via the syscall device on systems
+	  supporting the UC Berkely Host/Target Interface (HTIF).
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
index 10d6f2a41e22..c581382be86d 100644
--- a/drivers/power/reset/Makefile
+++ b/drivers/power/reset/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_POWER_RESET_SYSCON) += syscon-reboot.o
 obj-$(CONFIG_POWER_RESET_SYSCON_POWEROFF) += syscon-poweroff.o
 obj-$(CONFIG_POWER_RESET_GPIO) += gpio-poweroff.o
 obj-$(CONFIG_POWER_RESET_GPIO_RESTART) += gpio-restart.o
+obj-$(CONFIG_POWER_RESET_HTIF_POWEROFF) += htif-poweroff.o
diff --git a/drivers/power/reset/htif-poweroff.c b/drivers/power/reset/htif-poweroff.c
new file mode 100644
index 000000000000..8df060d5079f
--- /dev/null
+++ b/drivers/power/reset/htif-poweroff.c
@@ -0,0 +1,46 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2021 Ahmad Fatoum, Pengutronix
+ */
+
+#include <common.h>
+#include <driver.h>
+#include <poweroff.h>
+#include <asm/htif.h>
+
+static void __iomem *htif = IOMEM(HTIF_DEFAULT_BASE_ADDR);
+
+static void __noreturn riscvemu_poweroff(struct poweroff_handler *pwr)
+{
+	shutdown_barebox();
+
+	__htif_tohost(htif, HTIF_DEV_SYSCALL, 0, 1);
+
+	__builtin_unreachable();
+}
+
+static int htif_poweroff_probe(struct device_d *dev)
+{
+	struct resource *iores;
+
+	iores = dev_request_mem_resource(dev, 0);
+	if (!IS_ERR(iores))
+		htif = IOMEM(iores->start);
+	else if (PTR_ERR(iores) != -ENOENT)
+		return PTR_ERR(iores);
+
+	return poweroff_handler_register_fn(riscvemu_poweroff);
+}
+
+
+static const struct of_device_id htif_poweroff_of_match[] = {
+	{ .compatible = "ucb,htif0" },
+	{}
+};
+
+static struct driver_d htif_poweroff_driver = {
+	.name = "htif-poweroff",
+	.of_compatible = htif_poweroff_of_match,
+	.probe = htif_poweroff_probe,
+};
+coredevice_platform_driver(htif_poweroff_driver);
-- 
2.30.2


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[PATCH 3/9] RISC-V: virt: riscvemu: add HTIF DEBUG_LL support

[Ahmad Fatoum]

Default console of riscvemu is available Virt I/O console and as a HTIF
blocking character device. We already support Virt I/O console, but the
HTIF is easier to support for very early low level debugging. Add
DEBUG_LL support to facilitate using it.

Note: when using a framebuffer, riscvemu doesn't allocate a default
console, so barebox calling into HTIF will segfault the emulator.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 arch/riscv/include/asm/debug_ll.h | 11 +++++++++++
 arch/riscv/include/asm/htif.h     |  9 +++++++++
 common/Kconfig                    |  9 +++++++++
 3 files changed, 29 insertions(+)

diff --git a/arch/riscv/include/asm/debug_ll.h b/arch/riscv/include/asm/debug_ll.h
index 867c96d79724..de9bc5f5fd33 100644
--- a/arch/riscv/include/asm/debug_ll.h
+++ b/arch/riscv/include/asm/debug_ll.h
@@ -53,6 +53,17 @@ static inline void PUTC_LL(char ch)
 
 #include <asm/debug_ll_litex.h>
 
+#elif defined CONFIG_DEBUG_RISCVEMU_HTIF
+
+#include <asm/htif.h>
+
+#ifndef __ASSEMBLY__
+static inline void PUTC_LL(char ch)
+{
+	htif_putc(IOMEM(HTIF_DEFAULT_BASE_ADDR), ch);
+}
+#endif
+
 #endif
 
 #ifndef debug_ll_init
diff --git a/arch/riscv/include/asm/htif.h b/arch/riscv/include/asm/htif.h
index 7312f09d2e6e..b35afdd98e1d 100644
--- a/arch/riscv/include/asm/htif.h
+++ b/arch/riscv/include/asm/htif.h
@@ -11,6 +11,10 @@
 #define HTIF_DEV_SYSCALL		0
 #define		HTIF_CMD_SYSCALL	0
 
+#define HTIF_DEV_CONSOLE		1 /* blocking character device */
+#define		HTIF_CMD_GETCHAR	0
+#define		HTIF_CMD_PUTCHAR	1
+
 #ifndef __ASSEMBLY__
 
 #include <linux/types.h>
@@ -26,6 +30,11 @@ static inline void htif_tohost(u8 device, u8 command, u64 arg)
 	__htif_tohost(IOMEM(HTIF_DEFAULT_BASE_ADDR), device, command, arg);
 }
 
+static inline void htif_putc(void __iomem *base, int c)
+{
+	__htif_tohost(base, HTIF_DEV_CONSOLE, HTIF_CMD_PUTCHAR, c);
+}
+
 #endif
 
 #endif
diff --git a/common/Kconfig b/common/Kconfig
index 802bd9bfbb2e..2f014509da0d 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -1403,6 +1403,15 @@ config DEBUG_RISCV_VIRT
 	depends on SOC_VIRT
 	select DEBUG_LL_NS16550
 
+config DEBUG_RISCVEMU_HTIF
+	bool "riscvemu HTIF port"
+	depends on SOC_VIRT
+	help
+	  When run without graphics support, tinyemu will expose access
+	  to the Virt I/O console as HTIF blocking console device as well.
+	  This is useful for low level debugging before Virt I/O DMA is
+	  initialized.
+
 config DEBUG_SIFIVE
 	bool "SiFive serial0 port"
 	depends on SOC_SIFIVE
-- 
2.30.2


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[PATCH 4/9] RISC-V: virt: riscvemu: repurpose 64k low RAM for state/environment

[Ahmad Fatoum]

TinyEMU's RISC-V machine emulates a 64K SRAM at address 0.
First 4K page is unused, then a maximum of 0x40 bytes for boot ROM
(trampoline that passes FDT), then the FDT. The remainder of the 64K is
unused. Make use of that space for storing state and environment.

We start the mtd-ram at 0x1000 to easily allow for a faulting zero page.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 arch/riscv/boards/riscvemu/Makefile           |   1 +
 arch/riscv/boards/riscvemu/board.c            |   9 ++
 .../riscv/boards/riscvemu/overlay-of-sram.dts | 119 ++++++++++++++++++
 arch/riscv/configs/virt32_defconfig           |   1 +
 arch/riscv/configs/virt64_defconfig           |   1 +
 5 files changed, 131 insertions(+)
 create mode 100644 arch/riscv/boards/riscvemu/overlay-of-sram.dts

diff --git a/arch/riscv/boards/riscvemu/Makefile b/arch/riscv/boards/riscvemu/Makefile
index ad283446eaf1..75f52ada8f37 100644
--- a/arch/riscv/boards/riscvemu/Makefile
+++ b/arch/riscv/boards/riscvemu/Makefile
@@ -1,3 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
 obj-y += board.o
+obj-y += overlay-of-sram.dtb.o
diff --git a/arch/riscv/boards/riscvemu/board.c b/arch/riscv/boards/riscvemu/board.c
index 73d787a8335a..60c93716a2bc 100644
--- a/arch/riscv/boards/riscvemu/board.c
+++ b/arch/riscv/boards/riscvemu/board.c
@@ -7,6 +7,7 @@
 #include <driver.h>
 #include <poweroff.h>
 #include <restart.h>
+#include <deep-probe.h>
 #include <asm/system.h>
 #include <asm/barebox-riscv.h>
 
@@ -28,12 +29,19 @@ static void __noreturn riscvemu_restart(struct restart_handler *rst)
 	priv->restart(riscv_hartid(), barebox_riscv_boot_dtb());
 }
 
+extern char __dtb_overlay_of_sram_start[];
+
 static int riscvemu_probe(struct device_d *dev)
 {
 	struct device_node *of_chosen;
+	struct device_node *overlay;
 	struct riscvemu_priv *priv;
 	u64 start;
 
+	overlay = of_unflatten_dtb(__dtb_overlay_of_sram_start, INT_MAX);
+	of_overlay_apply_tree(dev->device_node, overlay);
+	/* of_probe() will happen later at of_populate_initcall */
+
 	of_chosen = of_find_node_by_path("/chosen");
 
 	if (of_property_read_u64(of_chosen, "riscv,kernel-start", &start))
@@ -52,6 +60,7 @@ static const struct of_device_id riscvemu_of_match[] = {
 	{ .compatible = "ucbbar,riscvemu-bar_dev" },
 	{ /* sentinel */ },
 };
+BAREBOX_DEEP_PROBE_ENABLE(riscvemu_of_match);
 
 static struct driver_d riscvemu_board_driver = {
 	.name = "board-riscvemu",
diff --git a/arch/riscv/boards/riscvemu/overlay-of-sram.dts b/arch/riscv/boards/riscvemu/overlay-of-sram.dts
new file mode 100644
index 000000000000..839887fef24c
--- /dev/null
+++ b/arch/riscv/boards/riscvemu/overlay-of-sram.dts
@@ -0,0 +1,119 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target-path = "/soc";
+		__overlay__ {
+			#address-cells = <2>;
+			#size-cells = <2>;
+			sram@0 {
+				compatible = "mtd-ram";
+				reg = <0 0x1000 0 0x10000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "bootrom";
+						reg = <0x0 0x40>;
+					};
+
+					partition@40 {
+						label = "fdt";
+						reg = <0x40 0x1fc0>;
+					};
+
+					environment_sram: partition@3000 {
+						label = "barebox-environment";
+						reg = <0x3000 0xb000>;
+					};
+
+					backend_state_sram: partition@e000 {
+						label = "barebox-state";
+						reg = <0xe000 0x1000>;
+					};
+				};
+			};
+		};
+	};
+
+	fragment@2 {
+		target-path = "/chosen";
+		__overlay__ {
+			environment {
+				compatible = "barebox,environment";
+				device-path = "/soc/sram@0/partitions/partition@3000";
+			};
+		};
+	};
+
+	fragment@3 {
+		target-path = "/";
+		__overlay__ {
+			aliases {
+				state = "/state";
+			};
+
+			state {
+				#address-cells = <1>;
+				#size-cells = <1>;
+				compatible = "barebox,state";
+				magic = <0x290cf8c6>;
+				backend-type = "raw";
+				backend = <&backend_state_sram>;
+				backend-stridesize = <64>;
+
+				bootstate {
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					system0 {
+						#address-cells = <1>;
+						#size-cells = <1>;
+
+						remaining_attempts@0 {
+							reg = <0x0 0x4>;
+							type = "uint32";
+							default = <3>;
+						};
+
+						priority@4 {
+							reg = <0x4 0x4>;
+							type = "uint32";
+							default = <20>;
+						};
+					};
+
+					system1 {
+						#address-cells = <1>;
+						#size-cells = <1>;
+
+						remaining_attempts@8 {
+							reg = <0x8 0x4>;
+							type = "uint32";
+							default = <3>;
+						};
+
+						priority@c {
+							reg = <0xc 0x4>;
+							type = "uint32";
+							default = <21>;
+						};
+					};
+
+					last_chosen@10 {
+						reg = <0x10 0x4>;
+						type = "uint32";
+					};
+				};
+			};
+		};
+	};
+};
diff --git a/arch/riscv/configs/virt32_defconfig b/arch/riscv/configs/virt32_defconfig
index bfea7771efd8..28a20673e9b7 100644
--- a/arch/riscv/configs/virt32_defconfig
+++ b/arch/riscv/configs/virt32_defconfig
@@ -88,6 +88,7 @@ CONFIG_MTD=y
 # CONFIG_MTD_OOB_DEVICE is not set
 CONFIG_MTD_CONCAT=y
 CONFIG_MTD_M25P80=y
+CONFIG_MTD_MTDRAM=y
 CONFIG_DRIVER_CFI=y
 CONFIG_DRIVER_CFI_BANK_WIDTH_8=y
 CONFIG_DISK=y
diff --git a/arch/riscv/configs/virt64_defconfig b/arch/riscv/configs/virt64_defconfig
index 2ddc174b8a65..17588f61fa35 100644
--- a/arch/riscv/configs/virt64_defconfig
+++ b/arch/riscv/configs/virt64_defconfig
@@ -89,6 +89,7 @@ CONFIG_MTD=y
 # CONFIG_MTD_OOB_DEVICE is not set
 CONFIG_MTD_CONCAT=y
 CONFIG_MTD_M25P80=y
+CONFIG_MTD_MTDRAM=y
 CONFIG_DRIVER_CFI=y
 CONFIG_DRIVER_CFI_BANK_WIDTH_8=y
 CONFIG_DISK=y
-- 
2.30.2


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[PATCH 5/9] RISC-V: virt: riscvemu: be explicit about HTIF base address

[Ahmad Fatoum]

The normal riscvemu console is Virt I/O, which isn't really suitable to
poke from the command line as part of the incoming jsbarebox tutorial.

The HTIF on the other hand can be poked quite comfortably. To make it
look more like normal devices, fix up an address. No functional change.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 arch/riscv/boards/riscvemu/overlay-of-sram.dts | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/riscv/boards/riscvemu/overlay-of-sram.dts b/arch/riscv/boards/riscvemu/overlay-of-sram.dts
index 839887fef24c..506d45bde9b6 100644
--- a/arch/riscv/boards/riscvemu/overlay-of-sram.dts
+++ b/arch/riscv/boards/riscvemu/overlay-of-sram.dts
@@ -116,4 +116,14 @@
 			};
 		};
 	};
+
+	fragment@4 {
+		target-path = "/htif";
+		#address-cells = <2>;
+		#size-cells = <2>;
+
+		__overlay__ {
+			reg = <0 0x40008000 0 0x8>;
+		};
+	};
 };
-- 
2.30.2


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[PATCH 6/9] RISC-V: virt: riscvemu: clear frame buffer before jumping to reset vector

[Ahmad Fatoum]

Our poor man's reset just resumes execution at the reset vector, so the
framebuffer will maintain its contents over reset, leading to artifacts.
Clear screen before reset to avoid this.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 arch/riscv/boards/riscvemu/board.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/riscv/boards/riscvemu/board.c b/arch/riscv/boards/riscvemu/board.c
index 60c93716a2bc..31d0c70be643 100644
--- a/arch/riscv/boards/riscvemu/board.c
+++ b/arch/riscv/boards/riscvemu/board.c
@@ -21,6 +21,9 @@ static void __noreturn riscvemu_restart(struct restart_handler *rst)
 {
 	struct riscvemu_priv *priv = container_of(rst, struct riscvemu_priv, rst);
 
+	/* clear screen on graphic console */
+	puts("\e[J");
+
 	/*
 	 * barebox PBL relocates itself to end of RAM early on, so unless
 	 * something explicitly scrubbed the initial PBL, we can jump back to
-- 
2.30.2


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[PATCH 7/9] RISC-V: don't use x8/s0/fp in assembly

[Ahmad Fatoum]

Free up the register to allow building a configuration with x8/s0 used
as the frame pointer.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 arch/riscv/include/asm/debug_ll_litex.h   | 12 +++---
 arch/riscv/include/asm/debug_ll_ns16550.h |  8 ++--
 arch/riscv/include/asm/riscv_nmon.h       | 50 +++++++++++------------
 3 files changed, 35 insertions(+), 35 deletions(-)

diff --git a/arch/riscv/include/asm/debug_ll_litex.h b/arch/riscv/include/asm/debug_ll_litex.h
index 2fcdd9b0ec3e..295477fc1010 100644
--- a/arch/riscv/include/asm/debug_ll_litex.h
+++ b/arch/riscv/include/asm/debug_ll_litex.h
@@ -90,11 +90,11 @@ static inline void PUTC_LL(char ch)
 	li	t0, DEBUG_LL_UART_ADDR
 
 	/* get line status and check for data present */
-	lbu	s0, UART_RXEMPTY(t0)
-	bnez    s0, 243f
-	li	s0, 1
+	lbu	s1, UART_RXEMPTY(t0)
+	bnez    s1, 243f
+	li	s1, 1
 	j	244f
-243:	li	s0, 0
+243:	li	s1, 0
 244:	nop
 #endif /* CONFIG_DEBUG_LL */
 .endm
@@ -109,10 +109,10 @@ static inline void PUTC_LL(char ch)
 	debug_ll_tstc
 
 	/* try again */
-	beqz	s0, 204b
+	beqz	s1, 204b
 
 	/* read a character */
-	lb	s0, UART_RXTX(t0)
+	lb	s1, UART_RXTX(t0)
 	li      t1, UART_EV_RX
 	sb	t1, UART_EV_PENDING(t0)
 
diff --git a/arch/riscv/include/asm/debug_ll_ns16550.h b/arch/riscv/include/asm/debug_ll_ns16550.h
index e208ef4fb1e1..47f0be328ce8 100644
--- a/arch/riscv/include/asm/debug_ll_ns16550.h
+++ b/arch/riscv/include/asm/debug_ll_ns16550.h
@@ -143,8 +143,8 @@ static inline void debug_ll_ns16550_init(void)
 	li      t0, DEBUG_LL_UART_ADDR
 
 	/* get line status and check for data present */
-	UART_REG_L	s0, UART_LSR(DEBUG_LL_UART_SHIFT)(t0)
-	andi	s0, s0, UART_LSR_DR
+	UART_REG_L	s1, UART_LSR(DEBUG_LL_UART_SHIFT)(t0)
+	andi	s1, s1, UART_LSR_DR
 
 #endif /* CONFIG_DEBUG_LL */
 .endm
@@ -159,10 +159,10 @@ static inline void debug_ll_ns16550_init(void)
 	debug_ll_tstc
 
 	/* try again */
-	beqz	s0, 204b
+	beqz	s1, 204b
 
 	/* read a character */
-	UART_REG_L	s0, UART_RBR(DEBUG_LL_UART_SHIFT)(t0)
+	UART_REG_L	s1, UART_RBR(DEBUG_LL_UART_SHIFT)(t0)
 
 #endif /* CONFIG_DEBUG_LL */
 .endm
diff --git a/arch/riscv/include/asm/riscv_nmon.h b/arch/riscv/include/asm/riscv_nmon.h
index 8a44e216d72d..3e349025febc 100644
--- a/arch/riscv/include/asm/riscv_nmon.h
+++ b/arch/riscv/include/asm/riscv_nmon.h
@@ -84,7 +84,7 @@ nmon_main:
 	debug_ll_getc
 
 	li	a0, 'q'
-	bne	s0, a0, 3f
+	bne	s1, a0, 3f
 
 	jal	a2, _nmon_outc_a0
 
@@ -92,13 +92,13 @@ nmon_main:
 
 3:
 	li	a0, 'd'
-	beq	s0, a0, nmon_cmd_d
+	beq	s1, a0, nmon_cmd_d
 
 	li	a0, 'w'
-	beq	s0, a0, nmon_cmd_w
+	beq	s1, a0, nmon_cmd_w
 
 	li	a0, 'g'
-	beq	s0, a0, nmon_cmd_g
+	beq	s1, a0, nmon_cmd_g
 
 	j	nmon_main_help
 
@@ -112,7 +112,7 @@ nmon_cmd_d:
 
 	nmon_outs	msg_nl
 
-	lw	a0, (s0)
+	lw	a0, (s1)
 	debug_ll_outhexw
 
 	j	nmon_main
@@ -124,13 +124,13 @@ nmon_cmd_w:
 	jal	a2, _nmon_outc_a0
 
 	jal	a2, _nmon_gethexw
-	move	s2, s0
+	move	s3, s1
 
 	li	a0, ' '
 	jal	a2, _nmon_outc_a0
 	jal	a2, _nmon_gethexw
 
-	sw	s0, 0(s2)
+	sw	s1, 0(s3)
 	j	nmon_main
 
 nmon_cmd_g:
@@ -140,11 +140,11 @@ nmon_cmd_g:
 	jal	a2, _nmon_outc_a0
 
 	jal	a2, _nmon_gethexw
-	move	s2, s0
+	move	s3, s1
 
 	nmon_outs	msg_nl
 
-	jalr	s2
+	jalr	s3
 	j	nmon_main
 
 _nmon_outc_a0:
@@ -169,37 +169,37 @@ _nmon_gethexw:
 _get_hex_digit:
 	debug_ll_getc
 
-	li	s1, CODE_ESC
-	beq	s0, s1, nmon_main
+	li	s2, CODE_ESC
+	beq	s1, s2, nmon_main
 
-	li	s1, '0'
-	bge	s0, s1, 0f
+	li	s2, '0'
+	bge	s1, s2, 0f
 	j	_get_hex_digit
 
 0:
-	li	s1, '9'
-	ble	s0, s1, 9f
+	li	s2, '9'
+	ble	s1, s2, 9f
 
-	li	s1, 'f'
-	ble	s0, s1, 1f
+	li	s2, 'f'
+	ble	s1, s2, 1f
 	j	_get_hex_digit
 
 1:
-	li	s1, 'a'
-	bge	s0, s1, 8f
+	li	s2, 'a'
+	bge	s1, s2, 8f
 
 	j	_get_hex_digit
 
-8: /* s0 \in {'a', 'b' ... 'f'} */
-	sub	a3, s0, s1
+8: /* s1 \in {'a', 'b' ... 'f'} */
+	sub	a3, s1, s2
 	addi	a3, a3, 0xa
 	j	0f
 
-9: /* s0 \in {'0', '1' ... '9'} */
+9: /* s1 \in {'0', '1' ... '9'} */
 	li	a3, '0'
-	sub	a3, s0, a3
+	sub	a3, s1, a3
 
-0:	move	a0, s0
+0:	move	a0, s1
 	debug_ll_outc_a0
 
 	sll	t2, t2, 4
@@ -212,7 +212,7 @@ _get_hex_digit:
 	j	_get_hex_digit
 
 0:
-	move	s0, t2
+	move	s1, t2
 
 _nmon_jr_ra_exit:
 	jr	a2
-- 
2.30.2


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[PATCH 8/9] RISC-V: add stacktrace support via frame pointer walking

[Ahmad Fatoum]

Make debugging more convenient by implementing stack_dump() and changing
exception handlers to print stack trace along with the register dump.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 Makefile                                    |  5 ++
 arch/riscv/Kconfig                          | 10 +++
 arch/riscv/cpu/interrupts.c                 |  3 +
 arch/riscv/include/asm/barebox-riscv-head.h |  1 +
 arch/riscv/include/asm/ptrace.h             | 10 +--
 arch/riscv/include/asm/unwind.h             |  8 ++-
 arch/riscv/lib/Makefile                     |  1 +
 arch/riscv/lib/stacktrace.c                 | 79 +++++++++++++++++++++
 common/Kconfig                              | 12 ++++
 9 files changed, 123 insertions(+), 6 deletions(-)
 create mode 100644 arch/riscv/lib/stacktrace.c

diff --git a/Makefile b/Makefile
index ab9d3e677e19..a6b6a5be20aa 100644
--- a/Makefile
+++ b/Makefile
@@ -632,6 +632,11 @@ endif # need-config
 
 KBUILD_CFLAGS		+= -ggdb3
 
+ifdef CONFIG_FRAME_POINTER
+KBUILD_CFLAGS	+= -fno-omit-frame-pointer -fno-optimize-sibling-calls
+KBUILD_CFLAGS	+= $(call cc-disable-warning,frame-address,)
+endif
+
 # Force gcc to behave correct even for buggy distributions
 KBUILD_CFLAGS          += $(call cc-option, -fno-stack-protector)
 
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index e093ed4226de..1190cd42723f 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -85,6 +85,16 @@ config RISCV_EXCEPTIONS
 	default y
 	select ARCH_HAS_DATA_ABORT_MASK
 
+config RISCV_UNWIND
+	bool "enable stack unwinding support"
+	select ARCH_HAS_STACK_DUMP
+	select ARCH_WANT_FRAME_POINTERS
+	help
+	  This option enables stack unwinding support in barebox
+	  using the information automatically generated by the
+	  compiler. The resulting kernel image is slightly bigger but
+	  the performance is not affected.
+
 config HAS_NMON
 	bool
 
diff --git a/arch/riscv/cpu/interrupts.c b/arch/riscv/cpu/interrupts.c
index 1f2d7b885737..0bb56d441d96 100644
--- a/arch/riscv/cpu/interrupts.c
+++ b/arch/riscv/cpu/interrupts.c
@@ -14,6 +14,7 @@
 #include <asm/ptrace.h>
 #include <asm/irq.h>
 #include <asm/csr.h>
+#include <asm/unwind.h>
 #include <abort.h>
 #include <pbl.h>
 
@@ -81,6 +82,8 @@ static void report_trap(const struct pt_regs *regs)
 	       regs->epc, regs->ra, regs->badaddr);
 
 	show_regs(regs);
+
+	unwind_backtrace(regs);
 }
 
 
diff --git a/arch/riscv/include/asm/barebox-riscv-head.h b/arch/riscv/include/asm/barebox-riscv-head.h
index a4c33472cd53..4d62c20d1b2d 100644
--- a/arch/riscv/include/asm/barebox-riscv-head.h
+++ b/arch/riscv/include/asm/barebox-riscv-head.h
@@ -23,6 +23,7 @@
 		".ascii \"" magic2 "\"\n"      /* magic 2 */                          \
 		".word 0\n"                    /* reserved (PE-COFF offset) */        \
 		"1:\n"                                                                \
+		"li fp, 0\n"                                                          \
 	)
 
 #define __barebox_riscv_header(instr, load_offset, version, magic1, magic2) \
diff --git a/arch/riscv/include/asm/ptrace.h b/arch/riscv/include/asm/ptrace.h
index b5e792f6669b..319c50f946a8 100644
--- a/arch/riscv/include/asm/ptrace.h
+++ b/arch/riscv/include/asm/ptrace.h
@@ -61,7 +61,7 @@ struct pt_regs {
 #define MAX_REG_OFFSET offsetof(struct pt_regs, cause)
 
 /* Helpers for working with the instruction pointer */
-static inline unsigned long instruction_pointer(struct pt_regs *regs)
+static inline unsigned long instruction_pointer(const struct pt_regs *regs)
 {
 	return regs->epc;
 }
@@ -74,7 +74,7 @@ static inline void instruction_pointer_set(struct pt_regs *regs,
 #define profile_pc(regs) instruction_pointer(regs)
 
 /* Helpers for working with the user stack pointer */
-static inline unsigned long user_stack_pointer(struct pt_regs *regs)
+static inline unsigned long user_stack_pointer(const struct pt_regs *regs)
 {
 	return regs->sp;
 }
@@ -85,13 +85,13 @@ static inline void user_stack_pointer_set(struct pt_regs *regs,
 }
 
 /* Valid only for Kernel mode traps. */
-static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
+static inline unsigned long kernel_stack_pointer(const struct pt_regs *regs)
 {
 	return regs->sp;
 }
 
 /* Helpers for working with the frame pointer */
-static inline unsigned long frame_pointer(struct pt_regs *regs)
+static inline unsigned long frame_pointer(const struct pt_regs *regs)
 {
 	return regs->s0;
 }
@@ -101,7 +101,7 @@ static inline void frame_pointer_set(struct pt_regs *regs,
 	regs->s0 = val;
 }
 
-static inline unsigned long regs_return_value(struct pt_regs *regs)
+static inline unsigned long regs_return_value(const struct pt_regs *regs)
 {
 	return regs->a0;
 }
diff --git a/arch/riscv/include/asm/unwind.h b/arch/riscv/include/asm/unwind.h
index 9e5c8b542094..00f7845147b1 100644
--- a/arch/riscv/include/asm/unwind.h
+++ b/arch/riscv/include/asm/unwind.h
@@ -4,6 +4,12 @@
 
 struct pt_regs;
 
-void unwind_backtrace(struct pt_regs *regs);
+#if defined CONFIG_RISCV_UNWIND && !defined __PBL__
+void unwind_backtrace(const struct pt_regs *regs);
+#else
+static inline void unwind_backtrace(const struct pt_regs *regs)
+{
+}
+#endif
 
 #endif
diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile
index a399de7399cb..f3db5320f751 100644
--- a/arch/riscv/lib/Makefile
+++ b/arch/riscv/lib/Makefile
@@ -9,3 +9,4 @@ obj-$(CONFIG_RISCV_OPTIMZED_STRING_FUNCTIONS) += memcpy.o memset.o memmove.o
 obj-$(CONFIG_RISCV_SBI) += sbi.o
 obj-$(CONFIG_CMD_RISCV_CPUINFO) += cpuinfo.o
 obj-$(CONFIG_BOOTM) += bootm.o
+obj-$(CONFIG_RISCV_UNWIND) += stacktrace.o
diff --git a/arch/riscv/lib/stacktrace.c b/arch/riscv/lib/stacktrace.c
new file mode 100644
index 000000000000..663938019ee6
--- /dev/null
+++ b/arch/riscv/lib/stacktrace.c
@@ -0,0 +1,79 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2008 ARM Limited
+ * Copyright (C) 2014 Regents of the University of California
+ * Copyright (C) 2021 Ahmad Fatoum, Pengutronix
+ *
+ * Framepointer assisted stack unwinder
+ */
+
+#include <linux/kernel.h>
+#include <printk.h>
+#include <asm/unwind.h>
+#include <asm/ptrace.h>
+#include <asm-generic/memory_layout.h>
+#include <asm/sections.h>
+
+struct stackframe {
+	unsigned long fp;
+	unsigned long ra;
+};
+
+static void dump_backtrace_entry(unsigned long where, unsigned long from)
+{
+#ifdef CONFIG_KALLSYMS
+	printf("[<%08lx>] (%pS) from [<%08lx>] (%pS)\n", where, (void *)where, from, (void *)from);
+#else
+	printf("Function entered at [<%08lx>] from [<%08lx>]\n", where, from);
+#endif
+}
+
+static int unwind_frame(struct stackframe *frame, unsigned long *sp)
+{
+	unsigned long low, high;
+	unsigned long fp = frame->fp;
+
+	low = *sp;
+	high = ALIGN(low, STACK_SIZE);
+
+	if (fp < low || fp > high - sizeof(struct stackframe) || fp & 0x7)
+		return -1;
+
+	*frame = *((struct stackframe *)fp - 1);
+	*sp = fp;
+
+	return 0;
+}
+
+void unwind_backtrace(const struct pt_regs *regs)
+{
+        struct stackframe frame = {};
+	register unsigned long current_sp asm ("sp");
+	unsigned long sp = 0;
+
+	if (regs) {
+		frame.fp = frame_pointer(regs);
+		frame.ra = regs->ra;
+	} else {
+		sp = current_sp;
+		frame.fp = (unsigned long)__builtin_frame_address(0);
+		frame.ra = (unsigned long)unwind_backtrace;
+	}
+
+	printf("Call trace:\n");
+	for (;;) {
+		unsigned long where = frame.ra;
+		int ret;
+
+		ret = unwind_frame(&frame, &sp);
+		if (ret < 0)
+			break;
+
+		dump_backtrace_entry(where, frame.ra);
+	}
+}
+
+void dump_stack(void)
+{
+	unwind_backtrace(NULL);
+}
diff --git a/common/Kconfig b/common/Kconfig
index 2f014509da0d..060e21d9fedf 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -1209,6 +1209,18 @@ config DEBUG_LL
 	  platform *will not work*, so this option should not be enabled
 	  for builds that are intended to be portable.
 
+config ARCH_WANT_FRAME_POINTERS
+	bool
+
+config FRAME_POINTER
+	bool "Compile barebox with frame pointers" if COMPILE_TEST
+	default y if ARCH_WANT_FRAME_POINTERS
+	help
+	  Selected by platforms that expect frame pointer usage, e.g.
+	  when stack unwinding is enabled. The resulting barebox image
+	  will be slightly larger and slower, but it can give precise
+	  debugging information when print stack traces.
+
 choice
 	prompt "Kernel low-level debugging port"
 	depends on DEBUG_LL
-- 
2.30.2


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[PATCH 9/9] RISC-V: Virt: enable more useful options

[Ahmad Fatoum]

Incoming tutorial will showcase some barebox features, so enable them in
the config for use.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 arch/riscv/configs/virt32_defconfig | 6 ++++++
 arch/riscv/configs/virt64_defconfig | 6 ++++++
 2 files changed, 12 insertions(+)

diff --git a/arch/riscv/configs/virt32_defconfig b/arch/riscv/configs/virt32_defconfig
index 28a20673e9b7..b5044cf34aa5 100644
--- a/arch/riscv/configs/virt32_defconfig
+++ b/arch/riscv/configs/virt32_defconfig
@@ -10,11 +10,15 @@ CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BLSPEC=y
 CONFIG_CONSOLE_ACTIVATE_ALL=y
 CONFIG_CONSOLE_ALLOW_COLOR=y
 CONFIG_PBL_CONSOLE=y
 CONFIG_PARTITION_DISK_EFI=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW_IKCONFIG=y
 CONFIG_STATE=y
 CONFIG_STATE_CRYPTO=y
 CONFIG_BOOTCHOOSER=y
@@ -46,6 +50,7 @@ CONFIG_CMD_MSLEEP=y
 CONFIG_CMD_SLEEP=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_PING=y
+CONFIG_CMD_ECHO_E=y
 CONFIG_CMD_EDIT=y
 CONFIG_CMD_SPLASH=y
 CONFIG_CMD_FBTEST=y
@@ -101,6 +106,7 @@ CONFIG_DRIVER_VIDEO_SIMPLEFB_CLIENT=y
 CONFIG_CLOCKSOURCE_DUMMY_RATE=60000
 CONFIG_STATE_DRV=y
 CONFIG_EEPROM_AT24=y
+CONFIG_VIRTIO_INPUT=y
 CONFIG_HWRNG=y
 CONFIG_HW_RANDOM_VIRTIO=y
 CONFIG_GPIO_GENERIC_PLATFORM=y
diff --git a/arch/riscv/configs/virt64_defconfig b/arch/riscv/configs/virt64_defconfig
index 17588f61fa35..c2edd2dc2898 100644
--- a/arch/riscv/configs/virt64_defconfig
+++ b/arch/riscv/configs/virt64_defconfig
@@ -11,11 +11,15 @@ CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BLSPEC=y
 CONFIG_CONSOLE_ACTIVATE_ALL=y
 CONFIG_CONSOLE_ALLOW_COLOR=y
 CONFIG_PBL_CONSOLE=y
 CONFIG_PARTITION_DISK_EFI=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW_IKCONFIG=y
 CONFIG_STATE=y
 CONFIG_STATE_CRYPTO=y
 CONFIG_BOOTCHOOSER=y
@@ -47,6 +51,7 @@ CONFIG_CMD_MSLEEP=y
 CONFIG_CMD_SLEEP=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_PING=y
+CONFIG_CMD_ECHO_E=y
 CONFIG_CMD_EDIT=y
 CONFIG_CMD_SPLASH=y
 CONFIG_CMD_FBTEST=y
@@ -102,6 +107,7 @@ CONFIG_DRIVER_VIDEO_SIMPLEFB_CLIENT=y
 CONFIG_CLOCKSOURCE_DUMMY_RATE=60000
 CONFIG_STATE_DRV=y
 CONFIG_EEPROM_AT24=y
+CONFIG_VIRTIO_INPUT=y
 CONFIG_HWRNG=y
 CONFIG_HW_RANDOM_VIRTIO=y
 CONFIG_GPIO_GENERIC_PLATFORM=y
-- 
2.30.2


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Re: [PATCH 7/9] RISC-V: don't use x8/s0/fp in assembly

[Ahmad Fatoum]

Hello Antony,

On 08.01.22 18:15, Ahmad Fatoum wrote:
> Free up the register to allow building a configuration with x8/s0 used
> as the frame pointer.
> 
> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
> ---
>  arch/riscv/include/asm/debug_ll_litex.h   | 12 +++---
>  arch/riscv/include/asm/debug_ll_ns16550.h |  8 ++--
>  arch/riscv/include/asm/riscv_nmon.h       | 50 +++++++++++------------

I just bumped the s register: s2 -> s3, s1 -> s2, s0 -> s1 to
clear s0. Is that ok?

>  3 files changed, 35 insertions(+), 35 deletions(-)
> 
> diff --git a/arch/riscv/include/asm/debug_ll_litex.h b/arch/riscv/include/asm/debug_ll_litex.h
> index 2fcdd9b0ec3e..295477fc1010 100644
> --- a/arch/riscv/include/asm/debug_ll_litex.h
> +++ b/arch/riscv/include/asm/debug_ll_litex.h
> @@ -90,11 +90,11 @@ static inline void PUTC_LL(char ch)
>  	li	t0, DEBUG_LL_UART_ADDR
>  
>  	/* get line status and check for data present */
> -	lbu	s0, UART_RXEMPTY(t0)
> -	bnez    s0, 243f
> -	li	s0, 1
> +	lbu	s1, UART_RXEMPTY(t0)
> +	bnez    s1, 243f
> +	li	s1, 1
>  	j	244f
> -243:	li	s0, 0
> +243:	li	s1, 0
>  244:	nop
>  #endif /* CONFIG_DEBUG_LL */
>  .endm
> @@ -109,10 +109,10 @@ static inline void PUTC_LL(char ch)
>  	debug_ll_tstc
>  
>  	/* try again */
> -	beqz	s0, 204b
> +	beqz	s1, 204b
>  
>  	/* read a character */
> -	lb	s0, UART_RXTX(t0)
> +	lb	s1, UART_RXTX(t0)
>  	li      t1, UART_EV_RX
>  	sb	t1, UART_EV_PENDING(t0)
>  
> diff --git a/arch/riscv/include/asm/debug_ll_ns16550.h b/arch/riscv/include/asm/debug_ll_ns16550.h
> index e208ef4fb1e1..47f0be328ce8 100644
> --- a/arch/riscv/include/asm/debug_ll_ns16550.h
> +++ b/arch/riscv/include/asm/debug_ll_ns16550.h
> @@ -143,8 +143,8 @@ static inline void debug_ll_ns16550_init(void)
>  	li      t0, DEBUG_LL_UART_ADDR
>  
>  	/* get line status and check for data present */
> -	UART_REG_L	s0, UART_LSR(DEBUG_LL_UART_SHIFT)(t0)
> -	andi	s0, s0, UART_LSR_DR
> +	UART_REG_L	s1, UART_LSR(DEBUG_LL_UART_SHIFT)(t0)
> +	andi	s1, s1, UART_LSR_DR
>  
>  #endif /* CONFIG_DEBUG_LL */
>  .endm
> @@ -159,10 +159,10 @@ static inline void debug_ll_ns16550_init(void)
>  	debug_ll_tstc
>  
>  	/* try again */
> -	beqz	s0, 204b
> +	beqz	s1, 204b
>  
>  	/* read a character */
> -	UART_REG_L	s0, UART_RBR(DEBUG_LL_UART_SHIFT)(t0)
> +	UART_REG_L	s1, UART_RBR(DEBUG_LL_UART_SHIFT)(t0)
>  
>  #endif /* CONFIG_DEBUG_LL */
>  .endm
> diff --git a/arch/riscv/include/asm/riscv_nmon.h b/arch/riscv/include/asm/riscv_nmon.h
> index 8a44e216d72d..3e349025febc 100644
> --- a/arch/riscv/include/asm/riscv_nmon.h
> +++ b/arch/riscv/include/asm/riscv_nmon.h
> @@ -84,7 +84,7 @@ nmon_main:
>  	debug_ll_getc
>  
>  	li	a0, 'q'
> -	bne	s0, a0, 3f
> +	bne	s1, a0, 3f
>  
>  	jal	a2, _nmon_outc_a0
>  
> @@ -92,13 +92,13 @@ nmon_main:
>  
>  3:
>  	li	a0, 'd'
> -	beq	s0, a0, nmon_cmd_d
> +	beq	s1, a0, nmon_cmd_d
>  
>  	li	a0, 'w'
> -	beq	s0, a0, nmon_cmd_w
> +	beq	s1, a0, nmon_cmd_w
>  
>  	li	a0, 'g'
> -	beq	s0, a0, nmon_cmd_g
> +	beq	s1, a0, nmon_cmd_g
>  
>  	j	nmon_main_help
>  
> @@ -112,7 +112,7 @@ nmon_cmd_d:
>  
>  	nmon_outs	msg_nl
>  
> -	lw	a0, (s0)
> +	lw	a0, (s1)
>  	debug_ll_outhexw
>  
>  	j	nmon_main
> @@ -124,13 +124,13 @@ nmon_cmd_w:
>  	jal	a2, _nmon_outc_a0
>  
>  	jal	a2, _nmon_gethexw
> -	move	s2, s0
> +	move	s3, s1
>  
>  	li	a0, ' '
>  	jal	a2, _nmon_outc_a0
>  	jal	a2, _nmon_gethexw
>  
> -	sw	s0, 0(s2)
> +	sw	s1, 0(s3)
>  	j	nmon_main
>  
>  nmon_cmd_g:
> @@ -140,11 +140,11 @@ nmon_cmd_g:
>  	jal	a2, _nmon_outc_a0
>  
>  	jal	a2, _nmon_gethexw
> -	move	s2, s0
> +	move	s3, s1
>  
>  	nmon_outs	msg_nl
>  
> -	jalr	s2
> +	jalr	s3
>  	j	nmon_main
>  
>  _nmon_outc_a0:
> @@ -169,37 +169,37 @@ _nmon_gethexw:
>  _get_hex_digit:
>  	debug_ll_getc
>  
> -	li	s1, CODE_ESC
> -	beq	s0, s1, nmon_main
> +	li	s2, CODE_ESC
> +	beq	s1, s2, nmon_main
>  
> -	li	s1, '0'
> -	bge	s0, s1, 0f
> +	li	s2, '0'
> +	bge	s1, s2, 0f
>  	j	_get_hex_digit
>  
>  0:
> -	li	s1, '9'
> -	ble	s0, s1, 9f
> +	li	s2, '9'
> +	ble	s1, s2, 9f
>  
> -	li	s1, 'f'
> -	ble	s0, s1, 1f
> +	li	s2, 'f'
> +	ble	s1, s2, 1f
>  	j	_get_hex_digit
>  
>  1:
> -	li	s1, 'a'
> -	bge	s0, s1, 8f
> +	li	s2, 'a'
> +	bge	s1, s2, 8f
>  
>  	j	_get_hex_digit
>  
> -8: /* s0 \in {'a', 'b' ... 'f'} */
> -	sub	a3, s0, s1
> +8: /* s1 \in {'a', 'b' ... 'f'} */
> +	sub	a3, s1, s2
>  	addi	a3, a3, 0xa
>  	j	0f
>  
> -9: /* s0 \in {'0', '1' ... '9'} */
> +9: /* s1 \in {'0', '1' ... '9'} */
>  	li	a3, '0'
> -	sub	a3, s0, a3
> +	sub	a3, s1, a3
>  
> -0:	move	a0, s0
> +0:	move	a0, s1
>  	debug_ll_outc_a0
>  
>  	sll	t2, t2, 4
> @@ -212,7 +212,7 @@ _get_hex_digit:
>  	j	_get_hex_digit
>  
>  0:
> -	move	s0, t2
> +	move	s1, t2
>  
>  _nmon_jr_ra_exit:
>  	jr	a2
> 


-- 
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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Re: [PATCH 7/9] RISC-V: don't use x8/s0/fp in assembly

[Antony Pavlov]

On Sat, 8 Jan 2022 19:25:03 +0100
Ahmad Fatoum <a.fatoum@pengutronix.de> wrote:

Hi Ahmad!

> Hello Antony,
> 
> On 08.01.22 18:15, Ahmad Fatoum wrote:
> > Free up the register to allow building a configuration with x8/s0 used
> > as the frame pointer.
> > 
> > Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
> > ---
> >  arch/riscv/include/asm/debug_ll_litex.h   | 12 +++---
> >  arch/riscv/include/asm/debug_ll_ns16550.h |  8 ++--
> >  arch/riscv/include/asm/riscv_nmon.h       | 50 +++++++++++------------
> 
> I just bumped the s register: s2 -> s3, s1 -> s2, s0 -> s1 to
> clear s0. Is that ok?

I suppose that there is no problem if nmon still works under qemu.


> >  3 files changed, 35 insertions(+), 35 deletions(-)
> > 
> > diff --git a/arch/riscv/include/asm/debug_ll_litex.h b/arch/riscv/include/asm/debug_ll_litex.h
> > index 2fcdd9b0ec3e..295477fc1010 100644
> > --- a/arch/riscv/include/asm/debug_ll_litex.h
> > +++ b/arch/riscv/include/asm/debug_ll_litex.h
> > @@ -90,11 +90,11 @@ static inline void PUTC_LL(char ch)
> >  	li	t0, DEBUG_LL_UART_ADDR
> >  
> >  	/* get line status and check for data present */
> > -	lbu	s0, UART_RXEMPTY(t0)
> > -	bnez    s0, 243f
> > -	li	s0, 1
> > +	lbu	s1, UART_RXEMPTY(t0)
> > +	bnez    s1, 243f
> > +	li	s1, 1
> >  	j	244f
> > -243:	li	s0, 0
> > +243:	li	s1, 0
> >  244:	nop
> >  #endif /* CONFIG_DEBUG_LL */
> >  .endm
> > @@ -109,10 +109,10 @@ static inline void PUTC_LL(char ch)
> >  	debug_ll_tstc
> >  
> >  	/* try again */
> > -	beqz	s0, 204b
> > +	beqz	s1, 204b
> >  
> >  	/* read a character */
> > -	lb	s0, UART_RXTX(t0)
> > +	lb	s1, UART_RXTX(t0)
> >  	li      t1, UART_EV_RX
> >  	sb	t1, UART_EV_PENDING(t0)
> >  
> > diff --git a/arch/riscv/include/asm/debug_ll_ns16550.h b/arch/riscv/include/asm/debug_ll_ns16550.h
> > index e208ef4fb1e1..47f0be328ce8 100644
> > --- a/arch/riscv/include/asm/debug_ll_ns16550.h
> > +++ b/arch/riscv/include/asm/debug_ll_ns16550.h
> > @@ -143,8 +143,8 @@ static inline void debug_ll_ns16550_init(void)
> >  	li      t0, DEBUG_LL_UART_ADDR
> >  
> >  	/* get line status and check for data present */
> > -	UART_REG_L	s0, UART_LSR(DEBUG_LL_UART_SHIFT)(t0)
> > -	andi	s0, s0, UART_LSR_DR
> > +	UART_REG_L	s1, UART_LSR(DEBUG_LL_UART_SHIFT)(t0)
> > +	andi	s1, s1, UART_LSR_DR
> >  
> >  #endif /* CONFIG_DEBUG_LL */
> >  .endm
> > @@ -159,10 +159,10 @@ static inline void debug_ll_ns16550_init(void)
> >  	debug_ll_tstc
> >  
> >  	/* try again */
> > -	beqz	s0, 204b
> > +	beqz	s1, 204b
> >  
> >  	/* read a character */
> > -	UART_REG_L	s0, UART_RBR(DEBUG_LL_UART_SHIFT)(t0)
> > +	UART_REG_L	s1, UART_RBR(DEBUG_LL_UART_SHIFT)(t0)
> >  
> >  #endif /* CONFIG_DEBUG_LL */
> >  .endm
> > diff --git a/arch/riscv/include/asm/riscv_nmon.h b/arch/riscv/include/asm/riscv_nmon.h
> > index 8a44e216d72d..3e349025febc 100644
> > --- a/arch/riscv/include/asm/riscv_nmon.h
> > +++ b/arch/riscv/include/asm/riscv_nmon.h
> > @@ -84,7 +84,7 @@ nmon_main:
> >  	debug_ll_getc
> >  
> >  	li	a0, 'q'
> > -	bne	s0, a0, 3f
> > +	bne	s1, a0, 3f
> >  
> >  	jal	a2, _nmon_outc_a0
> >  
> > @@ -92,13 +92,13 @@ nmon_main:
> >  
> >  3:
> >  	li	a0, 'd'
> > -	beq	s0, a0, nmon_cmd_d
> > +	beq	s1, a0, nmon_cmd_d
> >  
> >  	li	a0, 'w'
> > -	beq	s0, a0, nmon_cmd_w
> > +	beq	s1, a0, nmon_cmd_w
> >  
> >  	li	a0, 'g'
> > -	beq	s0, a0, nmon_cmd_g
> > +	beq	s1, a0, nmon_cmd_g
> >  
> >  	j	nmon_main_help
> >  
> > @@ -112,7 +112,7 @@ nmon_cmd_d:
> >  
> >  	nmon_outs	msg_nl
> >  
> > -	lw	a0, (s0)
> > +	lw	a0, (s1)
> >  	debug_ll_outhexw
> >  
> >  	j	nmon_main
> > @@ -124,13 +124,13 @@ nmon_cmd_w:
> >  	jal	a2, _nmon_outc_a0
> >  
> >  	jal	a2, _nmon_gethexw
> > -	move	s2, s0
> > +	move	s3, s1
> >  
> >  	li	a0, ' '
> >  	jal	a2, _nmon_outc_a0
> >  	jal	a2, _nmon_gethexw
> >  
> > -	sw	s0, 0(s2)
> > +	sw	s1, 0(s3)
> >  	j	nmon_main
> >  
> >  nmon_cmd_g:
> > @@ -140,11 +140,11 @@ nmon_cmd_g:
> >  	jal	a2, _nmon_outc_a0
> >  
> >  	jal	a2, _nmon_gethexw
> > -	move	s2, s0
> > +	move	s3, s1
> >  
> >  	nmon_outs	msg_nl
> >  
> > -	jalr	s2
> > +	jalr	s3
> >  	j	nmon_main
> >  
> >  _nmon_outc_a0:
> > @@ -169,37 +169,37 @@ _nmon_gethexw:
> >  _get_hex_digit:
> >  	debug_ll_getc
> >  
> > -	li	s1, CODE_ESC
> > -	beq	s0, s1, nmon_main
> > +	li	s2, CODE_ESC
> > +	beq	s1, s2, nmon_main
> >  
> > -	li	s1, '0'
> > -	bge	s0, s1, 0f
> > +	li	s2, '0'
> > +	bge	s1, s2, 0f
> >  	j	_get_hex_digit
> >  
> >  0:
> > -	li	s1, '9'
> > -	ble	s0, s1, 9f
> > +	li	s2, '9'
> > +	ble	s1, s2, 9f
> >  
> > -	li	s1, 'f'
> > -	ble	s0, s1, 1f
> > +	li	s2, 'f'
> > +	ble	s1, s2, 1f
> >  	j	_get_hex_digit
> >  
> >  1:
> > -	li	s1, 'a'
> > -	bge	s0, s1, 8f
> > +	li	s2, 'a'
> > +	bge	s1, s2, 8f
> >  
> >  	j	_get_hex_digit
> >  
> > -8: /* s0 \in {'a', 'b' ... 'f'} */
> > -	sub	a3, s0, s1
> > +8: /* s1 \in {'a', 'b' ... 'f'} */
> > +	sub	a3, s1, s2
> >  	addi	a3, a3, 0xa
> >  	j	0f
> >  
> > -9: /* s0 \in {'0', '1' ... '9'} */
> > +9: /* s1 \in {'0', '1' ... '9'} */
> >  	li	a3, '0'
> > -	sub	a3, s0, a3
> > +	sub	a3, s1, a3
> >  
> > -0:	move	a0, s0
> > +0:	move	a0, s1
> >  	debug_ll_outc_a0
> >  
> >  	sll	t2, t2, 4
> > @@ -212,7 +212,7 @@ _get_hex_digit:
> >  	j	_get_hex_digit
> >  
> >  0:
> > -	move	s0, t2
> > +	move	s1, t2
> >  
> >  _nmon_jr_ra_exit:
> >  	jr	a2
> > 
> 
> 
> -- 
> Pengutronix e.K.                           |                             |
> Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
> 31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
> Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


-- 
Best regards,
  Antony Pavlov

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Re: [PATCH 1/9] RISC-V: virt: activate all consoles

[Sascha Hauer]

On Sat, Jan 08, 2022 at 06:15:16PM +0100, Ahmad Fatoum wrote:
> While CONSOLE_ACTIVATE_NONE + stdout-path is usually the way to go, main
> console on this platform can be virtio console, which can't be
> referenced as is in DT, so just enable all consoles.
> 
> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
> ---
>  arch/riscv/configs/virt32_defconfig | 1 +
>  arch/riscv/configs/virt64_defconfig | 1 +
>  2 files changed, 2 insertions(+)

Applied, thanks

Sascha


-- 
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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