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From: "Barbier, Renaud" <>
To: Ahmad Fatoum <>,
	Barebox List <>
Subject: RE: NXP Layerscape
Date: Mon, 14 Jun 2021 15:16:27 +0000	[thread overview]
Message-ID: <> (raw)
In-Reply-To: <>

I am a bit confused on how the QSPI image is built.
>From images/Makefile.layerscape
$(obj)/barebox-ls1046ardb-qspi.image: $(obj)/start_ls1046ardb.pblb \
          $(board)/ls1046ardb/ls1046ardb_rcw_qspi.cfg \

It makes use of the file ls1046ardb/ls1046ardb_pbi.cfg not ls1046ardb/ls1046ardb_qspi_pbi.cfg. 
ls1046a_qspi_pbi.cfg contains an endian swap that I can see in the U-boot rcw+pbi data.

When I take an hex dump of the barebox-ls1046ardb-qspi.image, I see that the scratchpad register 2 (BOOTLOCPTR) in the PBI section points to 0x10000000 (as in the PBI file), not the PBL address start address.
How can this work?


-----Original Message-----
From: Ahmad Fatoum <> 
Sent: 10 June 2021 15:09
To: Barbier, Renaud <>; Barebox List <>
Subject: Re: NXP Layerscape

[**EXTERNAL SOURCE**]:Please verify the source before clicking link or opening attachment.

Hello Barbier,

On 10.06.21 15:49, Barbier, Renaud wrote:
> I received a NXP  LS1046A-RDB

It doesn't reboot cleanly with a USB serial adapter attached!
Jfyi, gave me a scare first time, when I thought I broke something ^^.

> I built barebox for the LS1046A and got the image barebox-ls1046ardb-qspi.image.
> I programmed the image in the alternative SPI bank as per NXP instructions:
> =>    tftp $load_addr
> =>    sf erase 0 +$filesize && sf write $load_addr 0 $filesize
> Barebox does not boot.
> I did notice that u-boot is at address 0x40100000 while the RCW is at 0x40000000.
> My understanding is that barebox is one image and shall be programmed 
> at offset 0 of the SPI (0x40000000)

Can't comment on that. Sascha did the integration.

> At present I cannot connect my I.C.E. due a pin stuck in my MIPI connector.
> Any return on experience is welcome.

Can comment on that: Last time I did this, I wrote some documentation:;;sdata=SnXT0WYjQMJL%2FwK1LaOK1h7OMUcLiL37cojY2hzP89s%3D&amp;reserved=0

There I flashed barebox from another barebox booted from SD-Card.
I'd assume that should still work. I can't recall how the CPLD needed to be tickled, but it would be helpful to know whether doing it like described in the documentation doesn't work for you.


> Cheers,
> Renaud
> _______________________________________________
> barebox mailing list
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  parent reply	other threads:[~2021-06-14 15:18 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-10 13:49 Barbier, Renaud
2021-06-10 14:09 ` Ahmad Fatoum
2021-06-10 17:08   ` Barbier, Renaud
     [not found]   ` <>
     [not found]     ` <>
     [not found]       ` <>
2021-06-10 16:35         ` Ahmad Fatoum
     [not found]           ` <>
2021-06-10 16:50             ` Ahmad Fatoum
     [not found]       ` <>
2021-06-11  8:29         ` Ahmad Fatoum
2021-06-14 15:16   ` Barbier, Renaud [this message]
2021-06-15  8:49     ` Sascha Hauer
2021-06-15 19:02       ` Barbier, Renaud

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