Uart set up in PBL

Uart set up in PBL

[Barbier, Renaud]

Looking at many ARM platforms I see the UART is set in the PBL.

I guess the baud rate is fixed.

I am looking into a way to make the baud rate configurable. 
Would it possible from the PBL to read the "baudrate" variable from the environment?

Cheers,
Renaud


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Re: Uart set up in PBL

[Ahmad Fatoum]

Hello Renaud,

On 04.03.21 13:28, Barbier, Renaud wrote:
> Looking at many ARM platforms I see the UART is set in the PBL.

Two kinds of UART are set up in PBL:



 - low level debug: DEBUG_LL

	-> This is controlled via Kconfig and thus affects all
	   boards.
 Not meant for production use
, but for very
	   early debugging

 - PBL console: pbl_set_putc

	-> This affects only a single board and each board can decide

	   how to set up UART beforehand. This is for when you want
	   regular output in PBL (e.g. because you chainload from
	   MMC).

> I guess the baud rate is fixed.> I am looking into a way to make the baud rate configurable. 

For non-PBL, you got proper UART drivers, which can have their

baud rate configured via the baudrate device parameter, e.g.

serial1.baudrate=9600. This can come from a non-volatile variable.


> Would it possible from the PBL to read the "baudrate" variable from the environment?

Normally, you would want to avoid doing anything, but the
bare minimum from PBL. Does the baudrate device parameter
work for you?

Cheers,
Ahmad

> 
> Cheers,
> Renaud
> 
> 
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RE: Uart set up in PBL

[Barbier, Renaud]

> > Would it possible from the PBL to read the "baudrate" variable from the
> environment?
> 
> Normally, you would want to avoid doing anything, but the
> bare minimum from PBL. Does the baudrate device parameter
> work for you?
> 
[Barbier, Renaud] 
Just to give you a bit more context. In our platform ARM (all non-pbl) or PPC, we add a call to do a PBIT memory test before starting barebox. The uart is initialized just before that at a fixed baud rate of  9600 bauds. Now we have a requirement to support more than one baud rate configurable by the user. And our next ARM based board is going to have a PBL.

Are you saying that from the PBL, I can do something like baud=getenv("baudrate") to get the environment variable value. This would require to have /dev/env0 instantiated, would not it?
Does not that require to have the environment init code (fs support and all) be compiled as part of the PBL (lwl-y +=....).
My environment variables are in QSPI, so I would think I could parse the environment variable without the whole barebox support instead.
If not possible then I think we can find some other way to retrieve the baud rate.

Cheers.


> Cheers,
> Ahmad
> 
> >
> > Cheers,
> > Renaud
> >
> >
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Re: Uart set up in PBL

[Ahmad Fatoum]

Hello Renaud,

On 04.03.21 17:41, Barbier, Renaud wrote:
>>> Would it possible from the PBL to read the "baudrate" variable from the
>> environment?
>>
>> Normally, you would want to avoid doing anything, but the
>> bare minimum from PBL. Does the baudrate device parameter
>> work for you?
>>
> [Barbier, Renaud] 
> Just to give you a bit more context. In our platform ARM (all non-pbl) or PPC, we add a call to do a PBIT memory test before starting barebox. The uart is initialized just before that at a fixed baud rate of  9600 bauds. Now we have a requirement to support more than one baud rate configurable by the user. And our next ARM based board is going to have a PBL.
> 
> Are you saying that from the PBL, I can do something like baud=getenv("baudrate") to get the environment variable value. This would require to have /dev/env0 instantiated, would not it?

I am saying: don't do it from PBL at all if possible.

> Does not that require to have the environment init code (fs support and all) be compiled as part of the PBL (lwl-y +=....).
> My environment variables are in QSPI, so I would think I could parse the environment variable without the whole barebox support instead.
> If not possible then I think we can find some other way to retrieve the baud rate.

So you load pbl/bare init barebox into SRAM, run PBIT memory test on DRAM,
then extract/copy barebox proper to DRAM or how does it work?

Cheers,
Ahmad


> 
> Cheers.
> 
> 
>> Cheers,
>> Ahmad
>>
>>>
>>> Cheers,
>>> Renaud
>>>
>>>
>>> _______________________________________________
>>> barebox mailing list
>>> barebox@lists.infradead.org
>>>
>> https://nam11.safelinks.protection.outlook.com/?url=http%3A%2F%2Flists.infra
>> dead.org%2Fmailman%2Flistinfo%2Fbarebox&data=04%7C01%7Crenaud.b
>> arbier%40abaco.com%7C5feb6191d4d647f8afdb08d8df0d5b4c%7Ce6f2745189
>> 9d4d0db8fa88baafa551a7%7C0%7C0%7C637504595763337955%7CUnknown%
>> 7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiL
>> CJXVCI6Mn0%3D%7C1000&sdata=U5XVs%2Bf0L4t6LX49D7IJZNexAa77Pkjy
>> kZv74%2FJ8klk%3D&reserved=0
>>>
>>
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>> Steuerwalder Str. 21                       |
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>> C0%7C0%7C637504595763337955%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC
>> 4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&a
>> mp;sdata=H1Ifw3D43oCbwUMkyKECroRAm22bBXka2wbBMGFhM%2BE%3D&a
>> mp;reserved=0  |
>> 31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
>> Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
> 

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RE: Uart set up in PBL

[Barbier, Renaud]

> 
> So you load pbl/bare init barebox into SRAM, run PBIT memory test on DRAM,
> then extract/copy barebox proper to DRAM or how does it work?
> 
[Barbier, Renaud] 
For now I have never used PBL on ARM (lwl-y => obj-y). Probably did not do right as I  tweaked the barebox linker script to have a TEXT_BASE. Only reason I did not use PBL is that it did not boot first few time I tried and the other way worked right away.

PBIT runs from SPI NOR flash which is not a problem as there is a DDR BIST unit on our ARM SOC. I did include the memtester from pyropus.ca too for a more comprehensive test and obviously it is very slow running from flash with D-cache off. An improvement would be to run from SRAM.

>From the barebox_arm-reset_vector, the uart is set to a fixed baud rate, the DDR memory initialized and if PBIT is enabled a quick or comprehensive test is ran.  Otherwise use the BIST to initialise ECC if present and then barebox_arm_entry is called to relocate barebox in memory.







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Re: Uart set up in PBL

[Ahmad Fatoum]

Hello Renaud,

On 05.03.21 14:08, Barbier, Renaud wrote:
>> So you load pbl/bare init barebox into SRAM, run PBIT memory test on DRAM,
>> then extract/copy barebox proper to DRAM or how does it work?
>>
> [Barbier, Renaud] 
> For now I have never used PBL on ARM (lwl-y => obj-y). Probably did not do right as I  tweaked the barebox linker script to have a TEXT_BASE. Only reason I did not use PBL is that it did not boot first few time I tried and the other way worked right away.
> 
> PBIT runs from SPI NOR flash which is not a problem as there is a DDR BIST unit on our ARM SOC. I did include the memtester from pyropus.ca too for a more comprehensive test and obviously it is very slow running from flash with D-cache off. An improvement would be to run from SRAM.
> 
> From the barebox_arm-reset_vector, the uart is set to a fixed baud rate, the DDR memory initialized and if PBIT is enabled a quick or comprehensive test is ran.  Otherwise use the BIST to initialise ECC if present and then barebox_arm_entry is called to relocate barebox in memory.

I see. I am afraid there's no suitable API for early variable
readout you can directly use. Some solutions that come to mind:

  - If you have early chainloading to copy the reset of barebox
    into DRAM, you could use it to load a data block with your own
    format

  - The sama5d2 boards use FAT from PBL, before barebox proper is
    initialized. Only if you have an early block driver.

  - Read it from i2c EEPROM if available: There is early i2c code
    for i.MX (used for SPD EEPROM)

  - Change memory test to log to memory and then write from barebox
    proper

  - Dedicate a word in barebox header for the baud rate and patch the binary
    in flash to override it...


I'd be interested in hearing what you eventually decide on.

Cheers,
Ahmad



> 
> 
> 
> 
> 
> 
> 

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Re: Uart set up in PBL

[Sascha Hauer]

Hi Renaud,

On Thu, Mar 04, 2021 at 12:28:03PM +0000, Barbier, Renaud wrote:
> Looking at many ARM platforms I see the UART is set in the PBL.
> 
> I guess the baud rate is fixed.
> 
> I am looking into a way to make the baud rate configurable. 
> Would it possible from the PBL to read the "baudrate" variable from the environment?

There is CONFIG_BAUDRATE which could be configured in Kconfig you could
evaluate in the uart setup.
Reading the environment from PBL is something you don't want to do as
you would need drivers for all possible environment locations in PBL.
PBL console and configurable baudrate don't go together well, better
don't do it.

Sascha

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