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From: Ahmad Fatoum <a.fatoum@pengutronix.de>
To: barebox@lists.infradead.org
Cc: Ahmad Fatoum <a.fatoum@pengutronix.de>
Subject: [PATCH v2 24/29] watchdog: add StarFive watchdog driver
Date: Sat, 19 Jun 2021 06:50:50 +0200	[thread overview]
Message-ID: <20210619045055.779-25-a.fatoum@pengutronix.de> (raw)
In-Reply-To: <20210619045055.779-1-a.fatoum@pengutronix.de>

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 drivers/watchdog/Kconfig        |   7 +++
 drivers/watchdog/Makefile       |   1 +
 drivers/watchdog/starfive_wdt.c | 106 ++++++++++++++++++++++++++++++++
 3 files changed, 114 insertions(+)
 create mode 100644 drivers/watchdog/starfive_wdt.c

diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index b785181c59db..080bc91ff7f5 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -141,4 +141,11 @@ config ITCO_WDT
 	  NO_REBOOT flag which prevents the watchdog from rebooting the
 	  machine.
 
+config STARFIVE_WDT
+	tristate "StarFive Watchdog Timer"
+	depends on SOC_STARFIVE && OFDEVICE
+	help
+	  If you say yes here you get support for the watchdog device
+	  on StarFive SoCs.
+
 endif
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 0b598af40218..4e784b5aaa30 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -18,3 +18,4 @@ obj-$(CONFIG_STPMIC1_WATCHDOG) += stpmic1_wdt.o
 obj-$(CONFIG_F71808E_WDT) += f71808e_wdt.o
 obj-$(CONFIG_GPIO_WATCHDOG) += gpio_wdt.o
 obj-$(CONFIG_ITCO_WDT) += itco_wdt.o
+obj-$(CONFIG_STARFIVE_WDT) += starfive_wdt.o
diff --git a/drivers/watchdog/starfive_wdt.c b/drivers/watchdog/starfive_wdt.c
new file mode 100644
index 000000000000..6779566fd6c1
--- /dev/null
+++ b/drivers/watchdog/starfive_wdt.c
@@ -0,0 +1,106 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (C) 2018 Kalray Inc.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <io.h>
+#include <of.h>
+#include <watchdog.h>
+#include <linux/reset.h>
+
+#include <linux/clk.h>
+#include <linux/err.h>
+
+#define WDT_REG_RESET_EN	0x104
+#define WDT_REG_TIMEOUT		0x108
+#define WDT_REG_CONTROL		0x110
+#define WDT_REG_UNLOCK		0x13c
+
+#define WDT_UNLOCK_KEY		0x378f0765
+
+#define WDT_TICKS_PER_SEC	50000000
+
+struct starfive_wdt {
+	u32 clk_rate;
+	struct watchdog wdd;
+	void __iomem *base;
+	bool setup;
+};
+
+static int starfive_wdt_set_timeout(struct watchdog *wdd, unsigned int timeout)
+{
+	struct starfive_wdt *wd = container_of(wdd, struct starfive_wdt, wdd);
+
+	writel(0, wd->base + WDT_REG_CONTROL);
+
+	if (timeout > 0) {
+		timeout *= wd->clk_rate;
+		writel(timeout, wd->base + WDT_REG_TIMEOUT);
+		writel(1, wd->base + WDT_REG_CONTROL);
+	}
+
+	return 0;
+}
+
+static int starfive_wdt_drv_probe(struct device_d *dev)
+{
+	struct starfive_wdt *wd;
+	struct resource *iores;
+	struct watchdog *wdd;
+	struct clk_bulk_data clks[] = {
+		{ .id = "bus" },
+		{ .id = "core" },
+	};
+	int ret;
+
+	ret = clk_bulk_get(dev, ARRAY_SIZE(clks), clks);
+	if (ret)
+		return ret;
+
+	ret = clk_bulk_enable(ARRAY_SIZE(clks), clks);
+	if (ret < 0)
+		return ret;
+
+	ret = device_reset_all(dev);
+	if (ret)
+		return ret;
+
+	iores = dev_request_mem_resource(dev, 0);
+	if (IS_ERR(iores))
+		return PTR_ERR(iores);
+
+	wd = xzalloc(sizeof(*wd));
+	wd->base = IOMEM(iores->start);
+
+	wd->clk_rate = WDT_TICKS_PER_SEC;
+
+	writel(WDT_UNLOCK_KEY, wd->base + WDT_REG_UNLOCK);
+	wd->base = IOMEM(iores->start);
+	/* reset, not interrupt, on timer expiry */
+	writel(1, wd->base + WDT_REG_RESET_EN);
+
+	wdd = &wd->wdd;
+	wdd->name = "starfive_wdt";
+	wdd->hwdev = dev;
+	wdd->set_timeout = starfive_wdt_set_timeout;
+	wdd->timeout_max = U32_MAX / wd->clk_rate;
+
+	wdd->running = readl(wd->base + WDT_REG_CONTROL) & 1 ?
+		WDOG_HW_RUNNING : WDOG_HW_NOT_RUNNING;
+
+	return watchdog_register(wdd);
+}
+
+static struct of_device_id starfive_wdt_of_match[] = {
+	{ .compatible = "starfive,wdt", },
+	{ /* sentinel */ }
+};
+
+static struct driver_d starfive_wdt_driver = {
+	.name		= "starfive-wdt",
+	.probe		= starfive_wdt_drv_probe,
+	.of_compatible	= starfive_wdt_of_match,
+};
+device_platform_driver(starfive_wdt_driver);
-- 
2.29.2


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  parent reply	other threads:[~2021-06-19  4:54 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-19  4:50 [PATCH v2 00/29] RISC-V: add BeagleV Beta board support Ahmad Fatoum
2021-06-19  4:50 ` [PATCH v2 01/29] clocksource: RISC-V: demote probe success messages to debug level Ahmad Fatoum
2021-06-19  4:50 ` [PATCH v2 02/29] RISC-V: virt: select only one timer Ahmad Fatoum
2021-06-19  4:50 ` [PATCH v2 03/29] RISC-V: extend multi-image to support both S- and M-Mode Ahmad Fatoum
2021-06-19  4:50 ` [PATCH v2 04/29] RISC-V: cpuinfo: return some output for non-SBI systems as well Ahmad Fatoum
2021-06-19  4:50 ` [PATCH v2 05/29] RISC-V: S-Mode: propagate Hart ID Ahmad Fatoum
2021-06-19  4:50 ` [PATCH v2 06/29] RISC-V: erizo: make it easier to reuse ns16550 debug_ll Ahmad Fatoum
2021-06-19  4:50 ` [PATCH v2 07/29] RISC-V: socs: add Kconfig entry for StarFive JH7100 Ahmad Fatoum
2021-06-19  4:50 ` [PATCH v2 08/29] nvmem: add StarFive OTP support Ahmad Fatoum
2021-06-19  4:50 ` [PATCH v2 09/29] RISC-V: dma: support multiple dma_alloc_coherent backends Ahmad Fatoum
2021-06-19  4:50 ` [PATCH v2 10/29] RISC-V: add exception support Ahmad Fatoum
2021-06-19  4:50 ` [PATCH v2 11/29] RISC-V: support incoherent I-Cache Ahmad Fatoum
2021-06-19  4:50 ` [PATCH v2 12/29] drivers: soc: sifive: add basic L2 cache controller driver Ahmad Fatoum
2021-06-19  4:50 ` [PATCH v2 13/29] soc: starfive: add support for JH7100 incoherent interconnect Ahmad Fatoum
2021-06-19  4:50 ` [PATCH v2 14/29] soc: sifive: l2_cache: enable maximum available cache ways Ahmad Fatoum
2021-06-19  4:50 ` [PATCH v2 15/29] net: designware: fix non-1:1 mapped 64-bit systems Ahmad Fatoum
2021-06-21  7:25   ` Sascha Hauer
2021-06-21  7:33     ` Ahmad Fatoum
2021-06-19  4:50 ` [PATCH v2 16/29] net: designware: add support for IP integrated into StarFive SoC Ahmad Fatoum
2021-06-19  4:50 ` [PATCH v2 17/29] mci: allocate DMA-able memory Ahmad Fatoum
2021-06-19  4:50 ` [PATCH v2 18/29] mci: allocate sector_buf on demand Ahmad Fatoum
2021-06-19  4:50 ` [PATCH v2 19/29] dma: allocate 32-byte aligned buffers by default Ahmad Fatoum
2021-06-19  4:50 ` [PATCH v2 20/29] mci: dw_mmc: add optional reset line Ahmad Fatoum
2021-06-19  4:50 ` [PATCH v2 21/29] mci: dw_mmc: match against StarFive MMC compatibles Ahmad Fatoum
2021-06-19  4:50 ` [PATCH v2 22/29] clk: add initial StarFive clock support Ahmad Fatoum
2021-06-19  4:50 ` [PATCH v2 23/29] reset: add StarFive reset controller driver Ahmad Fatoum
2021-06-19  4:50 ` Ahmad Fatoum [this message]
2021-06-19  4:50 ` [PATCH v2 25/29] hw_random: add driver for RNG on StarFive SoC Ahmad Fatoum
2021-06-19  4:50 ` [PATCH v2 26/29] reset: add device_reset_all helper Ahmad Fatoum
2021-06-19  4:50 ` [PATCH v2 27/29] gpio: add support for StarFive GPIO controller Ahmad Fatoum
2021-06-19  4:50 ` [PATCH v2 28/29] misc: add power sequencing driver for initializing StarFive peripherals Ahmad Fatoum
2021-06-19  4:50 ` [PATCH v2 29/29] RISC-V: StarFive: add board support for BeagleV Starlight Ahmad Fatoum
2021-06-21  9:11 ` [PATCH v2 00/29] RISC-V: add BeagleV Beta board support Sascha Hauer

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