From: Ahmad Fatoum <a.fatoum@pengutronix.de> To: barebox@lists.infradead.org Cc: Ahmad Fatoum <a.fatoum@pengutronix.de> Subject: [PATCH 04/20] mtd: spi-nor: cadence: fix 64-bit issues Date: Mon, 31 May 2021 09:38:05 +0200 [thread overview] Message-ID: <20210531073821.15257-5-a.fatoum@pengutronix.de> (raw) In-Reply-To: <20210531073821.15257-1-a.fatoum@pengutronix.de> Pointers are being cast to unsigned int, which will truncate the address on 64-bit systems. Fix this. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> --- drivers/mtd/spi-nor/cadence-quadspi.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/mtd/spi-nor/cadence-quadspi.c b/drivers/mtd/spi-nor/cadence-quadspi.c index ea53d2cd847a..09015aad43f1 100644 --- a/drivers/mtd/spi-nor/cadence-quadspi.c +++ b/drivers/mtd/spi-nor/cadence-quadspi.c @@ -347,8 +347,8 @@ static int cqspi_command_read(struct spi_nor *nor, if (!n_rx || n_rx > CQSPI_STIG_DATA_LEN_MAX || rxbuf == NULL) { dev_err(nor->dev, - "Invalid input argument, len %d rxbuf 0x%08x\n", n_rx, - (unsigned int)rxbuf); + "Invalid input argument, len %d rxbuf %p\n", n_rx, + rxbuf); return -EINVAL; } @@ -393,8 +393,8 @@ static __maybe_unused int cqspi_command_write(struct spi_nor *nor, if (n_tx > 4 || (n_tx && txbuf == NULL)) { dev_err(nor->dev, - "Invalid input argument, cmdlen %d txbuf 0x%08x\n", - n_tx, (unsigned int)txbuf); + "Invalid input argument, cmdlen %d txbuf %p\n", + n_tx, txbuf); return -EINVAL; } @@ -433,7 +433,7 @@ static int cqspi_indirect_read_setup(struct spi_nor *nor, { struct cqspi_flash_pdata *f_pdata; struct cqspi_st *cqspi = nor->priv; - unsigned int ahb_base = (unsigned int) cqspi->ahb_base; + unsigned long ahb_base = (unsigned long) cqspi->ahb_base; void __iomem *reg_base = cqspi->iobase; unsigned int dummy_clk = 0; unsigned int dummy_bytes; -- 2.29.2 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
next prev parent reply other threads:[~2021-05-31 7:41 UTC|newest] Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-05-31 7:38 [PATCH 00/20] RISC-V: prepare for BeagleV pre-production board support Ahmad Fatoum 2021-05-31 7:38 ` [PATCH 01/20] RISC-V: socs: add Kconfig entry for StarFive JH7100 Ahmad Fatoum 2021-05-31 7:38 ` [PATCH 02/20] net: designware: add support for IP integrated into StarFive SoC Ahmad Fatoum 2021-05-31 7:38 ` [PATCH 03/20] mfd: add TI TPS65086 PMIC restart driver Ahmad Fatoum 2021-06-07 6:44 ` Sascha Hauer 2021-05-31 7:38 ` Ahmad Fatoum [this message] 2021-06-07 6:51 ` [PATCH 04/20] mtd: spi-nor: cadence: fix 64-bit issues Sascha Hauer 2021-05-31 7:38 ` [PATCH 05/20] nvmem: add StarFive OTP support Ahmad Fatoum 2021-05-31 7:38 ` [PATCH 06/20] RISC-V: dma: support multiple dma_alloc_coherent backends Ahmad Fatoum 2021-05-31 7:38 ` [PATCH 07/20] RISC-V: support incoherent I-Cache Ahmad Fatoum 2021-05-31 7:40 ` Ahmad Fatoum 2021-06-07 7:33 ` Ahmad Fatoum 2021-05-31 7:38 ` [PATCH 08/20] soc: add support for StarFive JH7100 incoherent interconnect Ahmad Fatoum 2021-05-31 7:38 ` [PATCH 09/20] soc: sifive: l2_cache: enable maximum available cache ways Ahmad Fatoum 2021-05-31 7:38 ` [PATCH 10/20] net: designware: fix 64-bit incompatibilities Ahmad Fatoum 2021-05-31 7:38 ` [PATCH 11/20] dma: support marking SRAM for coherent DMA use Ahmad Fatoum 2021-06-07 7:34 ` Sascha Hauer 2021-06-07 7:40 ` Ahmad Fatoum 2021-06-07 7:39 ` Sascha Hauer 2021-05-31 7:38 ` [PATCH 12/20] mci: allocate DMA-able memory Ahmad Fatoum 2021-05-31 7:38 ` [PATCH 13/20] mci: allocate sector_buf on demand Ahmad Fatoum 2021-05-31 7:38 ` [PATCH 14/20] dma: allocate 32-byte aligned buffers by default Ahmad Fatoum 2021-05-31 7:38 ` [PATCH 15/20] mci: dw_mmc: enable use on 64-bit CPUs Ahmad Fatoum 2021-05-31 7:38 ` [PATCH 16/20] mci: dw_mmc: match against generic "snps, dw-mshc" compatible Ahmad Fatoum 2021-05-31 7:38 ` [PATCH 17/20] clk: add initial StarFive clock support Ahmad Fatoum 2021-05-31 8:41 ` Ahmad Fatoum 2021-05-31 7:38 ` [PATCH 18/20] reset: add StarFive reset controller driver Ahmad Fatoum 2021-06-07 8:00 ` Sascha Hauer 2021-05-31 7:38 ` [PATCH 19/20] watchdog: add StarFive watchdog driver Ahmad Fatoum 2021-05-31 7:38 ` [PATCH 20/20] hw_random: add driver for RNG on StarFive SoC Ahmad Fatoum
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